ATLAS IBL: integration of new HW/SW readout features for the additional layer of Pixel Detector

An additional inner layer for the existing ATLAS Pixel Detector, called Insertable B-Layer (IBL), is under design. The front-end electronics features a new readout ASIC, named FE-I4, which requires new off-detector electronics, currently realized with two VME-based boards: the Back Of Crate module (BOC) implements optical I/O functionality and the ReadOut Driver module (ROD) implements data processing functionality, plus a Timing Interface Module (TIM). This paper presents a proposal for the IBL readout system, mainly focusing on the ROD board.