Bandwidth Extension Techniques for CMOS Amplifiers

Inductive-peaking-based bandwidth extension techniques for CMOS amplifiers in wireless and wireline applications are presented. To overcome the conventional limits on bandwidth extension ratios, these techniques augment inductive peaking using capacitive splitting and magnetic coupling. It is shown that a critical design constraint for optimum bandwidth extension is the ratio of the drain capacitance of the driver transistor to the load capacitance. This, in turn, recommends the use of different techniques for different capacitance ratios. Prototype wideband amplifiers in 0.18-mum CMOS are presented that achieve a measured bandwidth extension ratio up to 4.1 and simultaneously maintain high gain (>12 dB) in a single stage. Even higher enhancement ratios are shown through the introduction of a modified series-peaking technique combined with staggering techniques. Ultra-wideband low-noise amplifiers in 0.18-mum CMOS are presented that exhibit bandwidth extension ratios up to 4.9

[1]  Kiyong Choi,et al.  Parasitic-Aware Optimization of CMOS RF Circuits , 2003 .

[2]  A. Bevilacqua,et al.  An ultrawideband CMOS low-noise amplifier for 3.1-10.6-GHz wireless receivers , 2004, IEEE Journal of Solid-State Circuits.

[3]  David J. Allstot,et al.  A capacitor cross-coupled common-gate low-noise amplifier , 2005, IEEE Transactions on Circuits and Systems II: Express Briefs.

[4]  P. Heydari,et al.  A 1.8V three-stage 25GHz 3dB-BW differential non-uniform downsized distributed amplifier , 2005, ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005..

[5]  P. Heydari,et al.  Design of CMOS distributed circuits for multiband UWB wireless receivers [LNA and mixer] , 2005, 2005 IEEE Radio Frequency integrated Circuits (RFIC) Symposium - Digest of Papers.

[6]  W. Eisenstadt,et al.  Combined differential and common-mode scattering parameters: theory and simulation , 1995 .

[7]  Shen-Iuan Liu,et al.  CMOS wideband amplifiers using multiple inductive-series peaking technique , 2005, IEEE Journal of Solid-State Circuits.

[8]  D. Yamazaki,et al.  40Gb/s 4:1 MUX/1:4 DEMUX in 90nm standard CMOS , 2005, ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005..

[9]  Behzad Razavi,et al.  40-Gb/s amplifier and ESD protection circuit in 0.18-/spl mu/m CMOS technology , 2004, IEEE Journal of Solid-State Circuits.

[10]  Michael H. Perrott,et al.  A numerical design approach for high speed, differential, resistor-loaded, CMOS amplifiers , 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

[11]  D. Pozar.  Microwave Engineering , 1990 .

[12]  Frank A. Muller,et al.  High-Frequency Compensation of RC Amplifiers , 1954, Proceedings of the IRE.

[13]  David J. Allstot,et al.  A matrix amplifier in 0.18-/spl mu/m SOI CMOS , 2006, IEEE Transactions on Circuits and Systems I: Regular Papers.

[14]  David J. Allstot,et al.  A Matrix Amplifier in 0.18- m SOI CMOS , 2006 .

[15]  Kuo-Liang Deng,et al.  Design and analysis of DC-to-14-GHz and 22-GHz CMOS cascode , 2004 .

[16]  D.M.W. Leenaerts,et al.  An interference-robust receiver for ultra-wideband radio in SiGe BiCMOS technology , 2005, IEEE Journal of Solid-State Circuits.

[17]  A. Weisshaar,et al.  A comprehensive compact-modeling methodology for spiral inductors in silicon-based RFICs , 2004, IEEE Transactions on Microwave Theory and Techniques.

[18]  Kuei-Ann Wen,et al.  A low power CMOS low noise amplifier for ultra-wideband wireless applications , 2005, 2005 IEEE International Symposium on Circuits and Systems.

[19]  D.J. Allstot,et al.  G/sub m/-boosted common-gate LNA and differential colpitts VCO/QVCO in 0.18-/spl mu/m CMOS , 2005, IEEE Journal of Solid-State Circuits.

[20]  Frederick Warren Grover,et al.  Inductance Calculations: Working Formulas and Tables , 1981 .

[21]  W.R. Hewlett,et al.  Distributed Amplification , 1948, Proceedings of the IRE.

[22]  B. Razavi,et al.  Broadband ESD protection circuits in CMOS technology , 2003, 2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC..

[23]  S.S. Wong,et al.  Modeling and characterization of on-chip transformers , 1998, International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217).

[24]  D.J. Allstot,et al.  Design considerations for CMOS low-noise amplifiers , 2004, 2004 IEE Radio Frequency Integrated Circuits (RFIC) Systems. Digest of Papers.

[25]  D. Allstot,et al.  A CMOS 3.1-10.6 GHz UWB LNA employing stagger-compensated series peaking , 2006, IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2006.

[26]  Tbomas H. Lee,et al.  Planar Microwave Engineering , 2004 .

[27]  X Li,et al.  Gm-boosted common-gate LNA and differential colpitts VCO/QVCO in 0.18-μm CMOS , 2005 .

[28]  A. Hajimiri,et al.  Bandwidth enhancement for transimpedance amplifiers , 2004, IEEE Journal of Solid-State Circuits.

[29]  H.A. Wheeler.  Wide-band amplifiers for television , 1984, Proceedings of the IEEE.

[30]  Deog-Kyoon Jeong,et al.  Circuit techniques for a 40Gb/s transmitter in 0.13/spl mu/m CMOS , 2005, ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005..

[31]  P. Snoeij,et al.  A predictive model for Si-based circular spiral inductors , 1998, 1998 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems. Digest of Papers (Cat. No.98EX271).

[32]  Stephen P. Boyd,et al.  Bandwidth extension in CMOS with optimized on-chip inductors , 2000, IEEE Journal of Solid-State Circuits.