论文信息 - Efficiency comparison between doubler and Dickson charge pumps

Efficiency comparison between doubler and Dickson charge pumps

The paper presents a comparison between two of the most popular charge pump structures, the Dickson charge pump and the cascade of voltage doublers. The comparison has been carried out considering power efficiency as the main parameter of interest. The discussion is supported by theoretical analysis and experimental results. To compare the two topologies, two voltage elevators were designed and integrated in a triple-well 0.18-/spl mu/m CMOS technology. The two charge pumps were designed with the same operating clock frequency, the same storage capacitance per stage, and the same number of stages (and, thus, approximately the same area). The comparison showed that the voltage doubler has the higher power efficiency by about 13%.

[1] G. Palumbo,et al. Charge-pump circuits: power-consumption optimization , 2002 .

[2] John F. Dickson,et al. On-Chip High-Voltage Generation in Integrated Circuits Using an Improved Multiplier Technique , 1976 .

[3] T. Tanzawa,et al. A dynamic analysis of the Dickson charge pump circuit , 1997, IEEE J. Solid State Circuits.

[4] M. Pasotti,et al. Power efficient charge pump in deep submicron standard CMOS technology , 2003, Proceedings of the 27th European Solid-State Circuits Conference.

[5] Michel Declercq,et al. A high-efficiency CMOS voltage doubler , 1998, IEEE J. Solid State Circuits.