Cell placement by self-organisation

Abstract Cell placement is an important step in the physical design of VLSI circuits. The problem with present day algorithms is their inherent sequential nature and inability to efficiently exploit massively parallel architectures. This paper formulates cell placement as a self-organisation problem and presents the result of such an attempt. We use an adaptation of Kohonen's algorithm for self-organisation as it is well suited for implementation on massively parallel architectures. The placement problem is simplified by assuming cells to be of uniform width and the cost to be minimised as total weighted wire length. The results are compared to a similar experiment in cell placement. The algorithm is a general optimisation technique and has been successfully applied to other areas of VLSI CAD like scheduling and state assignment. “Birds of a feather, flock together”