A 40 nm 512 kb Cross-Point 8 T Pipeline SRAM With Binary Word-Line Boosting Control, Ripple Bit-Line and Adaptive Data-Aware Write-Assist
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Hao-I Yang | Ming-Hsien Tu | Nan-Chun Lien | Shyh-Jye Jou | Ching-Te Chuang | Wei Hwang | Li-Wei Chu | Chien-Hen Chen | Paul-Sen Kan | Yong-Jyun Hu | C. Chuang | Li-Wei Chu | W. Hwang | Hao-I Yang | Ming-Hsien Tu | Nan-Chun Lien | S. Jou | Paul-Sen Kan | Chien-Hen Chen | Yong-Jyun Hu
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