Speculative protocol processing for high-speed packet forwarding

Current network processors are VLSI-devices dedicated to high-speed packet forwarding. While their architectures are optimized for high throughput rates, they normally disregard protocol-processing delays which result from data dependencies inherent to encapsulated protocol-layers. The key to overcome this limitation is to speculatively dissolve these dependencies and to allow an accelerated control-path processing. This thesis comprises the entire framework of a speculative network processor conception, implementation and evaluation. Besides an generic evaluation, the benefit of the system is shown by system simulation. Utilizing the approach, a latency reduction of up to 14.9 percent can be achieved compared to traditional implementations.

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