Hierarchical techniques for symbolic analysis of large electronic circuits

A hierarchical symbolic analyzer (SAGA2) for the analysis of electronic circuits is presented. SAGA2 analyzes lumped, linear, or linearized (small-signal) circuits in the S- and Z-domain. For large circuits, a hierarchical two-port method is used that is two to three order faster than that without using the hierarchical method. Also, the memory used is dramatically reduced.<<ETX>>

[1]  J.L. Huertas,et al.  On simplification techniques for symbolic analysis of analog integrated circuits , 1992, [Proceedings] 1992 IEEE International Symposium on Circuits and Systems.

[2]  José Luis Huertas,et al.  Accurate simplification of large symbolic formulae , 1992, 1992 IEEE/ACM International Conference on Computer-Aided Design.

[3]  M. Hassoun.  Hierarchical symbolic analysis of large-scale systems using a Mason's signal flow graph model , 1991, 1991., IEEE International Sympoisum on Circuits and Systems.

[4]  P. M. Lin,et al.  Sensitivity analysis of large linear networks using symbolic programs , 1992, [Proceedings] 1992 IEEE International Symposium on Circuits and Systems.

[5]  Georges Gielen,et al.  Symbolic approximation strategies and the symbolic analysis of large and nonlinear circuits , 1991, 1991., IEEE International Sympoisum on Circuits and Systems.

[6]  W. Fichtner,et al.  Lazy-expansion symbolic expression approximation in SYNAP , 1992, 1992 IEEE/ACM International Conference on Computer-Aided Design.

[7]  Kishore Singhal,et al.  Computer Methods for Circuit Analysis and Design , 1983 .

[8]  C.-C. Hung,et al.  An efficient determinant approach to symbolic function generation for analog circuits , 1992, [1992] Proceedings of the 35th Midwest Symposium on Circuits and Systems.

[9]  Lawrence T. Pillage,et al.  Finite-pole macromodels of transmission lines for circuit simulation , 1993, Proceedings of IEEE Custom Integrated Circuits Conference - CICC '93.

[10]  P. M. Lin,et al.  A new network approach to symbolic simulation of large-scale networks , 1989, IEEE International Symposium on Circuits and Systems,.

[11]  Robert H. Fujii,et al.  SAUCES: a sensitivity analysis program for analog circuit design , 1992, [Proceedings] 1992 IEEE International Symposium on Circuits and Systems.

[12]  Jiri Vlach,et al.  Computer oriented formulation of equations and analysis of switched-capacitor networks , 1984 .

[13]  Georges Gielen,et al.  ISAAC: a symbolic simulator for analog integrated circuits , 1989, IEEE J. Solid State Circuits.

[14]  P. J. Windley,et al.  ACAD: A hierarchical approach to CMOS design analysis , 1993, Proceedings of IEEE Custom Integrated Circuits Conference - CICC '93.