The Design and Evaluation of an Integrated Wire-Bondless Power Module (IWPM) using Low Temperature Co-fired Ceramic Interposer

This article presents the plan and initial feasibility studies for an Integrated Wire Bond-less Power Module. Contemporary power modules are moving toward unprecedented levels of power density. The ball has been set rolling by a drastic reduction in the size of bare die power devices owing to the advent of wide bandgap semiconductors such as silicon carbide (SiC) and gallium nitride. SiC has capabilities of operating at much higher temperatures and faster switching speeds compared with its silicon counterparts, while being a fraction of their size. However, electronic packaging technology has not kept pace with these developments. High-performance packaging technologies do exist in isolation, but there has been limited success in integrating these disparate efforts into a single high-performance package of sufficient reliability. This article lays the foundation for an electronic package designed to completely leverage the benefits of SiC semiconductor technology, with a focus on high reliability and fast...

[1]  M. Egan,et al.  Parasitic inductance effect on switching losses for a high frequency Dc-Dc converter , 2008, 2008 Twenty-Third Annual IEEE Applied Power Electronics Conference and Exposition.

[2]  Mario A. Bolanos 3D Packaging Technology: Enabling the next wave of applications , 2010, 2010 34th IEEE/CPMT International Electronic Manufacturing Technology Symposium (IEMT).

[3]  A. Monti,et al.  New Developments in Gallium Nitride and the Impact on Power Electronics , 2005, 2005 IEEE 36th Power Electronics Specialists Conference.

[4]  Andreas Schletz,et al.  Reliability assessment of sintered nano-silver die attachment for power semiconductors , 2010, 2010 12th Electronics Packaging Technology Conference.

[5]  N. Seliger,et al.  Planar Interconnect Technology for Power Module System Integration , 2012, 2012 7th International Conference on Integrated Power Electronics Systems (CIPS).

[7]  Fred C. Lee,et al.  Packaging for thermal management of power electronics building blocks using metal posts interconnected parallel plate structure , 1998, ITherm'98. Sixth Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (Cat. No.98CH36208).

[8]  R. Fillion,et al.  High frequency, low cost, power packaging using thin film power overlay technology , 1995, Proceedings of 1995 IEEE Applied Power Electronics Conference and Exposition - APEC'95.

[9]  C. Bailey,et al.  Co-design and multi-physics analysis for power electronic modules , 2009, EuroSimE 2009 - 10th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems.

[10]  M. Karnezos,et al.  3D packaging: where all technologies come together , 2004, IEEE/CPMT/SEMI 29th International Electronics Manufacturing Technology Symposium (IEEE Cat. No.04CH37585).

[11]  Dushan Boroyevich,et al.  Extraction of parasitics within wire-bond IGBT modules , 1998, APEC '98 Thirteenth Annual Applied Power Electronics Conference and Exposition.

[12]  T. Stockmeier,et al.  From Packaging to "Un"-Packaging - Trends in Power Semiconductor Modules , 2008, 2008 20th International Symposium on Power Semiconductor Devices and IC's.

[13]  Madhavan Swaminathan Managing signal, power and thermal integrity for 3D integration , 2014, ITC.

[14]  G.Q. Zhang,et al.  The paradigm of "more than Moore" , 2005, 2005 6th International Conference on Electronic Packaging Technology.

[15]  Guo-Quan Lu,et al.  Thermomechanical Reliability of Low-Temperature Sintered Silver Die Attached SiC Power Device Assembly , 2006, IEEE Transactions on Device and Materials Reliability.

[16]  U.K. Mishra Gallium nitride electronics: Watt is the limit? [summary of GaN semiconductor devices] , 2004, Conference Digest [Includes 'Late News Papers' volume] Device Research Conference, 2004. 62nd DRC..

[17]  J. D. van Wyk,et al.  High-Temperature Operation of SiC Power Devices by Low-Temperature Sintered Silver Die-Attachment , 2007, IEEE Transactions on Advanced Packaging.

[18]  T. Chow,et al.  Silicon carbide benefits and advantages for power electronics circuits and systems , 2002, Proc. IEEE.

[19]  Thomas Stockmeier,et al.  SKiN: Double side sintering technology for new packages , 2011, 2011 IEEE 23rd International Symposium on Power Semiconductor Devices and ICs.

[20]  Dushan Boroyevich,et al.  Evaluation of metal post interconnected parallel plate structure for power electronic building blocks , 2000, APEC 2000. Fifteenth Annual IEEE Applied Power Electronics Conference and Exposition (Cat. No.00CH37058).

[21]  J. U. Knickerbocker Invited talk: 2.5D and 3D technology advancements for systems , 2013, 2013 IEEE Workshop on Microelectronics and Electron Devices (WMED).

[22]  Yoshikazu Takahashi,et al.  Ultra compact, low thermal impedance and high reliability module structure with SiC Schottky Barrier Diodes , 2011, 2011 Twenty-Sixth Annual IEEE Applied Power Electronics Conference and Exposition (APEC).

[23]  G. Deboy,et al.  The role of silicon, silicon carbide and gallium nitride in power electronics , 2012, 2012 International Electron Devices Meeting.

[24]  Graham E. Town Gallium nitride power electronic devices and circuits: A review , 2015, 2015 IEEE 11th International Conference on Power Electronics and Drive Systems.

[25]  Ray-Lee Lin,et al.  An innovative technique for packaging power electronic building blocks using metal posts interconnected parallel plate structures , 1999 .

[26]  J. Rabkowski,et al.  Silicon Carbide Power Transistors: A New Era in Power Electronics Is Initiated , 2012, IEEE Industrial Electronics Magazine.

[27]  R. N. Das,et al.  3D-interconnect approach for high end electronics , 2012, 2012 IEEE 62nd Electronic Components and Technology Conference.