Modeling and Design of EMI-Immune OpAmps in 0.18-$\mu$ m CMOS Technology

This paper explores the modeling and design of Miller-based operational amplifier structures that are highly immune to electromagnetic interference (EMI). The proposed CMOS Miller-based operational amplifier is derived using the present modeling. It provides higher immunity to EMI that is injected into the amplifier's input over a wide range of frequencies; moreover, the frequency response is comparable to that of a Miller operational amplifier. Simulation results show that the maximum EMI-induced input offset voltage for the proposed CMOS operational amplifier is 5 mV at an EMI frequency of 40 MHz, when a 900 mVpp EMI signal is applied at its input. In contrast, the standard Miller operational amplifier generates an input offset voltage of 32 mV under the same operating conditions. The developed mathematical modeling of the EMI-induced offset correlates with the circuit simulations, providing superior accuracy when designing for high EMI robustness.