Coming to grips with a RISC: a report of the progress of the LOW RISC design group
暂无分享,去创建一个
[1] T. Plato,et al. The Works Of Plato , 1804 .
[2] Manuel V. Hermenegildo,et al. An abstract machine based execution model for computer architecture design and efficient implementation of logic programs in parallel , 1986 .
[3] Emmanuel Katevenis,et al. Reduced instruction set computer architectures for VLSI , 1984 .
[4] Paul Reps,et al. Zen flesh, Zen bones , 1971 .
[5] Peter Van Roy. A Prolog Compiler for the PLM , 1984 .
[6] Yale N. Patt,et al. Performance studies of a Prolog machine architecture , 1985, ISCA '85.
[7] Yale N. Patt,et al. Design decisions influencing the microarchitecture for a Prolog machine , 1984, MICRO 17.
[8] T. Kuhn. The Structure of Scientific Revolutions. , 1964 .
[9] Carlo H. Séquin,et al. A VLSI RISC , 1982, Computer.
[10] Jonathan Wayne Mills. A High-Performance Low Risc Machine for Logic Programming , 1989, J. Log. Program..
[11] Kotagiri Ramamohanarao,et al. Paging Strategy for Prolog Based Dynamic Virtual Memory , 1986, SLP.
[12] David A. Patterson,et al. Reduced instruction set computers , 1985, CACM.
[13] Andrew K. Turk. Compiler Optimizations for the WAM , 1986, ICLP.
[14] Jeffrey D. Ullman,et al. Introduction to Automata Theory, Languages and Computation , 1979 .
[15] Brian Short. Use of instruction set simulators to evaluate the LOW RISC , 1987, CARN.
[16] David H. D. Warren,et al. Applied logic : its use and implementation as a programming tool , 1978 .
[17] Kenneth A. Bowen,et al. The Design and Implementation of a High-Speed Incremental Portable Prolog Compiler , 1986, ICLP.