Effective Synthesis of Asynchronous Systems from GR(1) Specifications

We consider automatic synthesis from linear temporal logic specifications for asynchronous systems. We aim the produced reactive systems to be used as software in a multi-threaded environment. We extend previous reduction of asynchronous synthesis to synchronous synthesis to the setting of multiple input and multiple output variables. Much like synthesis for synchronous designs, this solution is not practical as it requires determinization of automata on infinite words and solution of complicated games. We follow advances in synthesis of synchronous designs, which restrict the handled specifications but achieve scalability and efficiency. We propose a heuristic that, in some cases, maintains scalability for asynchronous synthesis. Our heuristic can prove that specifications are realizable and extract designs. This is done by a reduction to synchronous synthesis that is inspired by the theoretical reduction.

[1]  Amir Pnueli,et al.  On the Synthesis of an Asynchronous Reactive Module , 1989, ICALP.

[2]  Amir Pnueli,et al.  Synthesis of Reactive(1) Designs , 2006, VMCAI.

[3]  Pierre Wolper,et al.  Reasoning About Infinite Computations , 1994, Inf. Comput..

[4]  Amir Pnueli,et al.  Specify, Compile, Run: Hardware from PSL , 2007, COCV@ETAPS.

[5]  Hadas Kress-Gazit,et al.  Where's Waldo? Sensor-Based Temporal Logic Motion Planning , 2007, Proceedings 2007 IEEE International Conference on Robotics and Automation.

[6]  Ufuk Topcu,et al.  Receding horizon temporal logic planning for dynamical systems , 2009, Proceedings of the 48h IEEE Conference on Decision and Control (CDC) held jointly with 2009 28th Chinese Control Conference.

[7]  Ufuk Topcu,et al.  Automatic Synthesis of Robust Embedded Control Software , 2010, AAAI Spring Symposium: Embedded Reasoning.

[8]  Bernd Finkbeiner,et al.  Synthesis of Asynchronous Systems , 2006, LOPSTR.

[9]  Amir Pnueli,et al.  On the Merits of Temporal Testers , 2008, 25 Years of Model Checking.

[10]  Amir Pnueli,et al.  Synthesis of programs from temporal property specifications , 2009, 2009 7th IEEE/ACM International Conference on Formal Methods and Models for Co-Design.

[11]  Rajeev Alur,et al.  A Temporal Logic of Nested Calls and Returns , 2004, TACAS.

[12]  Amir Pnueli,et al.  Jtlv: A Framework for Developing Verification Algorithms , 2010, CAV.

[13]  Manuel V. Hermenegildo,et al.  Energy Consumption Analysis of Programs Based on XMOS ISA-Level Models , 2013, LOPSTR.

[14]  Orna Kupferman,et al.  Safraless decision procedures , 2005, 46th Annual IEEE Symposium on Foundations of Computer Science (FOCS'05).

[15]  Stephan Merz,et al.  Model Checking , 2000 .

[16]  Thomas A. Henzinger,et al.  Solving Games Without Determinization , 2006, CSL.

[17]  Sebastián Uchitel,et al.  Synthesis of live behaviour models for fallible domains , 2011, 2011 33rd International Conference on Software Engineering (ICSE).

[18]  M. Rabin.  Automata on Infinite Objects and Church's Problem , 1972 .

[19]  Perdita Stevens,et al.  Modelling Recursive Calls with UML State Diagrams , 2003, FASE.

[20]  Kousha Etessami,et al.  Analysis of Recursive Game Graphs Using Data Flow Equations , 2004, VMCAI.

[21]  Amir Pnueli,et al.  Revisiting Synthesis of GR(1) Specifications , 2010, Haifa Verification Conference.

[22]  Amir Pnueli,et al.  Faster Solutions of Rabin and Streett Games , 2006, 21st Annual IEEE Symposium on Logic in Computer Science (LICS'06).

[23]  Hillel Kugler,et al.  Compositional Synthesis of Reactive Systems from Live Sequence Chart Specifications , 2009, TACAS.

[24]  Alonzo Church,et al.  Logic, arithmetic, and automata , 1962 .

[25]  Pierre Wolper,et al.  The Complementation Problem for Büchi Automata with Appplications to Temporal Logic , 1987, Theor. Comput. Sci..

[26]  Moshe Y. Vardi.  An Automata-Theoretic Approach to Fair Realizability and Synthesis , 1995, CAV.

[27]  Amir Pnueli,et al.  On the synthesis of a reactive module , 1989, POPL '89.

[28]  Robin Milner,et al.  On Observing Nondeterminism and Concurrency , 1980, ICALP.

[29]  Ufuk Topcu,et al.  Receding horizon control for temporal logic specifications , 2010, HSCC '10.

[30]  Amir Pnueli,et al.  Controller Synthesis from LSC Requirements , 2009, FASE.

[31]  J. R. Büchi,et al.  Solving sequential conditions by finite-state strategies , 1969 .

[32]  Alex K. Simpson,et al.  Computational Adequacy in an Elementary Topos , 1998, CSL.

[33]  Amir Pnueli,et al.  Automatic Hardware Synthesis from Specifications: A Case Study , 2007 .

[34]  Hadas Kress-Gazit,et al.  Valet parking without a valet , 2007, 2007 IEEE/RSJ International Conference on Intelligent Robots and Systems.