A CMOS Continuous-Time Filter for PRML Read Channel Applications at 150 Mb/s and Beyond

Design techniques for equiripple phase CMOS continuous-time filters are presented, and their integration within a partial-response maximum likelihood (PRML) disk drive read channel is discussed. A programmable seven-pole two asymmetric zero filter implementation is described based on a new transconductance ( ) cell. The impact of integrator finite output impedance, excess phase, and other implementation- related nonidealities is discussed. A filter tuning circuit that requires an accurate time base but no external components is presented. The filter has a cutoff frequency ( ) range of 6-43 MHz, where is the 3 dB point of the magnitude transfer function with the two zeros set to infinity. Also, with finite zeros it is able to provide up to 12 dB of boost which is defined as the maximum value of the magnitude transfer function referred to dc. The group delay ripple stays within 2% for frequencies below 1.75 . The cutoff frequency exhibits a 650 ppm/ C temperature dependency and a variation of 1%/V with the power supply. Total harmonic distortion (THD) values are below 40 dB at twice the nominal operating input voltage ( mV peak-to-peak differential), and the dynamic range exceeds 60 dB (for a maximum input signal of 640 mV peak-to-peak differential, maximum bandwidth setting, and no boost). Both the filter and a tuning circuit were implemented in a 0.6- m single-poly triple-metal n-well CMOS process. They consume 90 mW from a single 5 V power supply and occupy an area of 0.8 mm .

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