Investigation of RC parasitics considering middle-of-the-line in si-bulk FinFETs for Sub-14-nm node logic applications
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Jun-Sik Yoon | E. Jeong | Ye-Ram Kim | Jae-Ho Hong | Jeong-Soo Lee | Y. Jeong | R. Baek | C. Baek
暂无分享,去创建一个
Jun-Sik Yoon | E. Jeong | Ye-Ram Kim | Jae-Ho Hong | Jeong-Soo Lee | Y. Jeong | R. Baek | C. Baek