A 300 mV 494GOPS/W Reconfigurable Dual-Supply 4-Way SIMD Vector Processing Accelerator in 45 nm CMOS
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Sanu Mathew | Mark Anders | Himanshu Kaul | Amit Agarwal | Steven Hsu | Ram Krishnamurthy | Shekhar Y. Borkar | S. Hsu | R. Krishnamurthy | S. Borkar | S. Mathew | H. Kaul | M. Anders | A. Agarwal
[1] H. Zhang,et al. A 1-V heterogeneous reconfigurable DSP IC for wireless baseband digital signal processing , 2000, IEEE Journal of Solid-State Circuits.
[2] Paul Wielage,et al. XETAL-II: A 107 GOPS, 600mW Massively-Parallel Processor for Video Scene Analysis , 2007, 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.
[3] R. Chau,et al. A 45nm Logic Technology with High-k+Metal Gate Transistors, Strained Silicon, 9 Cu Interconnect Layers, 193nm Dry Patterning, and 100% Pb-free Packaging , 2007, 2007 IEEE International Electron Devices Meeting.
[4] T. Gyohten,et al. The Design and Implementation of the Massively Parallel Processor Based on the Matrix Architecture , 2007, IEEE Journal of Solid-State Circuits.
[5] R.P. Kleihorst,et al. Xetal-II: A 107 GOPS, 600 mW Massively Parallel Processor for Video Scene Analysis , 2008, IEEE Journal of Solid-State Circuits.
[6] Bo Zhai,et al. Exploring Variability and Performance in a Sub-200-mV Processor , 2008, IEEE Journal of Solid-State Circuits.
[7] Kei Ito,et al. A 512GOPS Fully-Programmable Digital Image Processor with full HD 1080p Processing Capabilities , 2008, 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.
[8] An 11 mm$^{2}$ , 70 mW Fully Programmable Baseband Processor for Mobile WiMAX and DVB-T/H in 0.12$\ \mu$ m CMOS , 2009, IEEE Journal of Solid-State Circuits.
[9] M. K. Gowan,et al. A 65 nm 2-Billion Transistor Quad-Core Itanium Processor , 2009, IEEE Journal of Solid-State Circuits.
[10] S. Borkar,et al. A 320 mV 56 μW 411 GOPS/Watt Ultra-Low Voltage Motion Estimation Accelerator in 65 nm CMOS , 2009, IEEE Journal of Solid-State Circuits.
[11] A.P. Chandrakasan,et al. A 65 nm Sub-$V_{t}$ Microcontroller With Integrated SRAM and Switched Capacitor DC-DC Converter , 2008, IEEE Journal of Solid-State Circuits.
[12] S. Yoshioka,et al. A 65 nm Single-Chip Application and Dual-Mode Baseband Processor With Partial Clock Activation and IP-MMU , 2009, IEEE Journal of Solid-State Circuits.