A new method for improving sampling bandwidth of power analyzer

In recent years, increasing energy efficiency has garnered attention worldwide, due to its significant role in several domains. Power analyzers are widely used for power-related parameter calculation and real-time waveform display. However, the sampling rate of the power analyzer is normally relative low. As we know, for some high-frequency signals, if the sampling rate of the power analyzer does not satisfy the Nyquist sampling frequency, it will cause a waste of the analog channel bandwidth resources. Therefore, it is necessary to increase the power analyzer’s sampling rate. Equivalent sampling technology can greatly improve the equivalent sampling rate, but there also exist some problems, such as high sampling error and low refresh rate of waveform. In this paper, we describe a new equivalent sampling architecture which is suitable for power analyzer. It can increase the sampling rate of power analyzer to 100MSPS and the sampling bandwidth to 20MHz. What’s more, the effect of sampling delay error on waveform distortion can drastically reduced by averaging the multi-frame waveform. For a 20MHz sinusoidal input signal, when we set the average times as 256, then THD+Noise can be reduced to 0.75%, and the ENOB of the sampling system is only 10 bits.

[1]  Christian Vogel,et al.  The impact of combined channel mismatch effects in time-interleaved ADCs , 2005, IEEE Transactions on Instrumentation and Measurement.

[2]  A M Fard,et al.  Impact of Optical Nonlinearity on Performance of Photonic Time-Stretch Analog-to-Digital Converter , 2011, Journal of Lightwave Technology.

[3]  Wang Qi,et al.  The application of random equivalent sampling in acquisition system with 5Gsps real-time sampling , 2017, 2017 13th IEEE International Conference on Electronic Measurement & Instruments (ICEMI).

[4]  Yijiu Zhao,et al.  The Research and Application of Random Sampling in Digital Storage Oscilloscope , 2009, 2009 IEEE Circuits and Systems International Conference on Testing and Diagnosis.

[5]  Yu Hen Hu,et al.  Enhanced Random Equivalent Sampling Based on Compressed Sensing , 2012, IEEE Transactions on Instrumentation and Measurement.

[6]  Soon-Jyh Chang,et al.  A 10-bit 60-MS/s Low-Power Pipelined ADC With Split-Capacitor CDS Technique , 2010, IEEE Transactions on Circuits and Systems II: Express Briefs.

[7]  Tian Shulin,et al.  Algorithm based on TDC to estimate and calibrate delay between channels of high-speed data acquisition system , 2011, IEEE 2011 10th International Conference on Electronic Measurement & Instruments.

[8]  Stanislav Maslan,et al.  A validation of a THD measurement equipment with a 24-bit digitizer , 2014, 29th Conference on Precision Electromagnetic Measurements (CPEM 2014).

[9]  Michal Kolcun,et al.  Project design of the electric power quality analyzer using an open-source platform , 2018, 2018 International IEEE Conference and Workshop in Óbuda on Electrical and Power Engineering (CANDO-EPE).

[10]  Gao Jian,et al.  A novel hybrid architecture for ultra-fast and high-resolution data acquisition , 2017, 2017 13th IEEE International Conference on Electronic Measurement & Instruments (ICEMI).

[11]  Xiaoyan Zhuang,et al.  A sparse signal reconstruction approach for sequential equivalent time sampling , 2016, 2016 IEEE International Instrumentation and Measurement Technology Conference Proceedings.

[12]  Hyung Seok Kim,et al.  A Digital Fractional-N PLL With a PVT and Mismatch Insensitive TDC Utilizing Equivalent Time Sampling Technique , 2013, IEEE Journal of Solid-State Circuits.