A 41-mW 30-Gb/s CMOS optical receiver with digitally-tunable cascaded equalization
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Quan Pan | Li Sun | Wing-Hung Ki | Yipeng Wang | Patrick Chiang | C. Patrick Yue | Liang Wu | Zhengxiong Hou
[1] Wing-Hung Ki,et al. 17.11 A 0.65ns-response-time 3.01ps FOM fully-integrated low-dropout regulator with full-spectrum power-supply-rejection for wideband communication systems , 2014, 2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC).
[2] Quan Pan,et al. A 48-mW 18-Gb/s fully integrated CMOS optical receiver with photodetector and adaptive equalizer , 2014, 2014 Symposium on VLSI Circuits Digest of Technical Papers.
[3] Alexander V. Rylyakov,et al. 25Gb/s 3.6pJ/b and 15Gb/s 1.37pJ/b VCSEL-based optical links in 90nm CMOS , 2012, 2012 IEEE International Solid-State Circuits Conference.
[4] C. Patrick Yue,et al. A 23-mW 30-Gb/s digitally programmable limiting amplifier for 100GbE optical receivers , 2014, 2014 IEEE Radio Frequency Integrated Circuits Symposium.
[5] Timothy O. Dickson,et al. A 20-Gb/s, 0.66-pJ/bit serial receiver with 2-stage continuous-time linear equalizer and 1-tap decision feedback equalizer in 45nm SOI CMOS , 2011, 2011 Symposium on VLSI Circuits - Digest of Technical Papers.
[6] Wing-Hung Ki,et al. A 3-mW 25-Gb/s CMOS transimpedance amplifier with fully integrated low-dropout regulator for 100GbE systems , 2014, 2014 IEEE Radio Frequency Integrated Circuits Symposium.
[7] Jri Lee,et al. 100Gb/s ethernet chipsets in 65nm CMOS technology , 2013, 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers.
[8] Toru Yazaki,et al. A 4× 25-to-28Gb/s 4.9mW/Gb/s −9.7dBm high-sensitivity optical receiver based on 65nm CMOS for board-to-board interconnects , 2013, 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers.