Chapter 12 – Fault Handling

Publisher Summary This chapter discusses various aspects of the hard fault handler on the Cortex-M0 processor. The hard fault handler is almost the highest priority exception type, with a priority level of 1 and only the nonmaskable interrupt (NMI) can preempt it. It is suggested that one needs to know the register contents when the hard fault exception is entered and the register contents that were pushed to the stack just before the hard fault handler started. The values include the return program address, which usually tells the instruction address that caused the fault. It is found that as a hard fault could be caused by an error in the stack pointer value, a hard fault handler programmed in C language might not be able to perform correctly, as C-generated code might require stack memory to operate. A number of conditions that can cause lockup in the Cortex-M0 processor include a fault occurred during the execution of the NMI handler and a fault occurred during the execution of the hard fault handler. It is suggested that the hard fault and lockup behaviors allow error conditions to be detected and help debugging.