Optimized Schoolbook Polynomial Multiplication for Compact Lattice-Based Cryptography on FPGA

Lattice-based cryptography (LBC) is one of the most promising classes of post-quantum cryptography (PQC) that is being considered for standardization. This brief proposes an optimized schoolbook polynomial multiplication (SPM) for compact LBC. We exploit the symmetric nature of Gaussian noise for bit reduction. Additionally, a single field-programmable gate array (FPGA) DSP block is used for two parallel multiplication operations per clock cycle. These optimizations enable a significant <inline-formula> <tex-math notation="LaTeX">$2.2\times $ </tex-math></inline-formula> speedup along with reduced resources for dimension <inline-formula> <tex-math notation="LaTeX">$n=256$ </tex-math></inline-formula>. The overall efficiency (throughput per slice) is <inline-formula> <tex-math notation="LaTeX">$1.28\times $ </tex-math></inline-formula> higher than the conventional SPM, as well as contributing to a more compact LBC system compared to previously reported designs. The results targeting the FPGA platform show that the proposed design can achieve high hardware efficiency with reduced hardware area costs.

[1]  Frederik Vercauteren,et al.  Compact Ring-LWE Cryptoprocessor , 2014, CHES.

[2]  Tim Güneysu,et al.  Towards Practical Lattice-Based Public-Key Encryption on Reconfigurable Hardware , 2013, Selected Areas in Cryptography.

[3]  Tim Güneysu,et al.  Towards Efficient Arithmetic for Lattice-Based Cryptography on Reconfigurable Hardware , 2012, LATINCRYPT.

[4]  Ayesha Khalid,et al.  The design space of the number theoretic transform: A survey , 2017, 2017 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS).

[5]  Thomas Poppelmann,et al.  Area optimization of lightweight lattice-based encryption on reconfigurable hardware , 2014, 2014 IEEE International Symposium on Circuits and Systems (ISCAS).

[6]  Máire O'Neill,et al.  Time-independent discrete Gaussian sampling for post-quantum cryptography , 2016, 2016 International Conference on Field-Programmable Technology (FPT).

[7]  Máire O'Neill,et al.  Compact and provably secure lattice-based signatures in hardware , 2017, 2017 IEEE International Symposium on Circuits and Systems (ISCAS).

[8]  Diana Maimut,et al.  Post-quantum Cryptography and a (Qu)Bit More , 2018, SecITC.

[9]  Hui Lin,et al.  A Resource-Efficient and Side-Channel Secure Hardware Implementation of Ring-LWE Cryptographic Processor , 2019, IEEE Transactions on Circuits and Systems I: Regular Papers.

[10]  Chaohui Du,et al.  Towards efficient polynomial multiplication for lattice-based cryptography , 2016, 2016 IEEE International Symposium on Circuits and Systems (ISCAS).

[11]  Zhe Liu,et al.  Efficient Ring-LWE Encryption on 8-Bit AVR Processors , 2015, CHES.