The design of a low-distortion sigma-delta ADC for WLAN standards
暂无分享,去创建一个
A low-distortion sigma-delta analog-to-digital converter (ADC) for wireless local area network (WLAN) standards is presented. The proposed sigma-delta modulator architecture employs the 4-bit 2/sup nd/ order sigma-delta modulator with swing suppression in a 2-2 modified cascaded configuration, which greatly improves the tonal behavior even at 8X over-sampling ratio (OSR). The modulator is designed in 0.18/spl mu/m CMOS process and operates at 1.8V supply voltage. It achieves a dynamic range of 69.1dB and a spurious free dynamic range (SFDR) of 82.2dB for a 10MHz signal bandwidth, and an oversampling ratio of 8.
[1] Mohammed Ismail,et al. Multi-Standard CMOS Wireless Receivers: Analysis and Design , 2002 .
[2] Andrea Baschirotto,et al. Behavioral modeling of switched-capacitor sigma-delta modulators , 2003 .
[3] Ángel Rodríguez-Vázquez,et al. Top-Down Design of High-Performance Sigma-Delta Modulators , 1998 .
[5] Kenneth W. Martin,et al. High-order multibit modulators and pseudo data-weighted-averaging in low-oversampling ΔΣ ADCs for broad-band applications , 2004, IEEE Trans. Circuits Syst. I Regul. Pap..