Hardware/software synthesis of formal specifications in codesign of embedded systems

CoDesign aims to integrate the design techniques of hardware and software. In this work, we present a CoDesign methodology based on a formal approach to embedded system specification. This methodology uses the Templated T-LOTOS language to specify the system during all design phases. Templated T-LOTOS is a formal language based on CCS and CSP models. Using Templated T-LOTOS, a system can be specified by observing the temporal ordering in which the events occur from the outside. In this paper we focus on the synthesis of system specified by Templated T-LOTOS. The proposed synthesis algorithm takes advantage of peculiarities of Templates T-LOTOS. Hardware modules are translated into a register transfer-level language that manages some signals in order to drive synchronization, while the software models are translated into C according to a finite state model whose operations are controlled by a scheduler. The synthesis of the Templated T-LOTOS specification is based on the direct translation of the language operators to ensure that the implemented system is the same as the specified one.

[1]  Kiyoung Choi,et al.  Enforcing Schedulability of Multi-Task Systems by Hardware-Software Codesign , 1997, CODES.

[2]  Gerard J. Holzmann,et al.  Design and validation of computer protocols , 1991 .

[3]  Gaetano Borriello,et al.  The Chinook hardware/software co-synthesis system , 1995 .

[4]  Iso. Lotos,et al.  A Formal Description Technique Based on the Temporal Ordering of Observational Behaviour , 1985 .

[5]  Luciano Lavagno,et al.  A Formal Speci cation Model for Hardware / Software , 1993 .

[6]  Ralf Niemann.  Hardware/Software Co-Synthesis , 1998 .

[7]  John O'Leary,et al.  Codesign of communication protocols , 1993, Computer.

[8]  Frank Vahid.  Modifying Min-Cut for Hardware and Software Functional Partitioning , 1997, CODES.

[9]  William A. Wulf,et al.  A framework for hardware/software codesign , 1993, Computer.

[10]  Nicolas Halbwachs,et al.  LUSTRE: a declarative language for real-time programming , 1987, POPL '87.

[11]  R. P. Kurshan,et al.  Automata-theoretic verification of coordinating processes , 1994 .

[12]  Martin Peschke,et al.  Design and Validation of Computer Protocols , 2003 .

[13]  Hartmut Ehrig,et al.  Fundamentals of Algebraic Specification 2: Module Specifications and Constraints , 1990 .

[14]  Rajvir Singh,et al.  Digital Design and Synthesis with Verilog HDL , 1993 .

[15]  Wolfgang Thomas,et al.  Automata on Infinite Objects , 1991, Handbook of Theoretical Computer Science, Volume B: Formal Models and Sematics.

[16]  William A. Wulf,et al.  Capturing design rationale in concurrent engineering teams , 1993 .

[17]  Tim Melanchuk,et al.  The algebraic specification language LOTOS: an industrial experience , 1990, Formal Methods in Software Development.

[18]  Edward A. Feigenbaum,et al.  Switching and Finite Automata Theory: Computer Science Series , 1990 .

[19]  Vincenza Carchiolo,et al.  Formal Codesign Methodology , 1998 .

[20]  Robert S. Boyer,et al.  The Boyer-Moore theorem prover and its interactive enhancement , 1995 .

[21]  Luciano Lavagno,et al.  Synthesis of Software Programs for Embedded Control Applications , 1999, 32nd Design Automation Conference.

[22]  Wayne H. Wolf,et al.  An Automaton Model for Scheduling Constraints in Synchronous Machines , 1995, IEEE Trans. Computers.

[23]  C. A. R. Hoare,et al.  Communicating sequential processes , 1978, CACM.

[24]  Sudhakar Yalamanchili,et al.  Adaptive routing protocols for hypercube interconnection networks , 1993, Computer.

[25]  Jakob Axelsson,et al.  Hardware/software partitioning aiming at fulfilment of real-time constraints , 1996, J. Syst. Archit..

[26]  Frank Vahid,et al.  Modifying min-cut for hardware and software functional partitioning , 1997, Proceedings of 5th International Workshop on Hardware/Software Co Design. Codes/CASHE '97.

[27]  Doron Drusinsky,et al.  Using statecharts for hardware description and synthesis , 1989, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[28]  Albert Benveniste,et al.  Signal-A data flow-oriented language for signal processing , 1986, IEEE Trans. Acoust. Speech Signal Process..

[29]  Gaetano Borriello,et al.  Scheduling for reactive real-time systems , 1994, IEEE Micro.

[30]  Tommaso Bolognesi,et al.  Tableau methods to describe strong bisimilarity on LOTOS processes involving pure interleaving and enabling , 1994, FORTE.

[31]  Giovanni De Micheli,et al.  Synthesis and simulation of digital systems containing interacting hardware and software components , 1992, [1992] Proceedings 29th ACM/IEEE Design Automation Conference.

[32]  Luciano Lavagno,et al.  A Formal Specification Model for Hardware/Software Codesign , 1993 .

[33]  David C. Ku,et al.  HardwareC -- A Language for Hardware Design (Version 2.0) , 1990 .

[34]  BolognesiTommaso,et al.  Introduction to the ISO specification language LOTOS , 1987 .

[35]  Marten van Sinderen,et al.  Architecture and Specification Style in Formal Descriptions of Distributed Systems , 1988 .

[36]  Michele Malgeri,et al.  Applying fuzzy logic to codesign partitioning , 1997, IEEE Micro.

[37]  Wolfgang A. Halang,et al.  Constructing Predictable Real Time Systems , 1991 .

[38]  Albert Benveniste,et al.  The synchronous approach to reactive and real-time systems , 1991 .

[39]  Alan Bundy,et al.  Boyer-Moore Theorem Prover , 1984 .

[40]  Juan Quemada,et al.  State Exploration by Transformation with LOLA , 1989, Automatic Verification Methods for Finite State Systems.

[41]  Peter van Eijk.  Tools for LOTOS Specification Style Transformation , 1989, FORTE.

[42]  Giovanni De Micheli,et al.  Synthesis and Optimization of Digital Circuits , 1994 .

[43]  James A. Rowson,et al.  Hardware / Software Co-Simulation , 2000 .

[44]  Rick Reed,et al.  Telecommunications systems engineering using SDL , 1989 .

[45]  John Wilson.  Hardware/software selected cycle solution , 1994, CODES.

[46]  Giovanni De Micheli,et al.  Program implementation schemes for hardware-software systems , 1994, Computer.

[47]  Kiyoung Choi,et al.  Enforcing Schedulability of Multi-Task Systems by Hardware-Software Codesign , 1997, CODES.

[48]  R.K. Gupta,et al.  Constrained software generation for hardware-software systems , 1994, Third International Workshop on Hardware/Software Codesign.

[49]  Giovanni De Micheli,et al.  Hardware-software cosynthesis for digital systems , 1993, IEEE Design & Test of Computers.

[50]  Donald E. Thomas,et al.  Multiple-process behavioral synthesis for mixed hardware-software systems , 1995 .

[51]  Johan Lewi,et al.  An Algebraic Specification Language , 1989 .

[52]  M. Gordon,et al.  Introduction to HOL: a theorem proving environment for higher order logic , 1993 .

[53]  Alberto L. Sangiovanni-Vincentelli,et al.  Modeling micro-controller peripherals for high-level co-simulation and synthesis , 1997, CODES.

[54]  Jörg Henkel,et al.  Hardware-software cosynthesis for microcontrollers , 1993, IEEE Design & Test of Computers.

[55]  Vincenza Carchiolo,et al.  Formal Codesign Methodology with Multistep Partitioning , 1998, VLSI Design.

[56]  Michele Malgeri,et al.  A framework for codesign based on fuzzy logic and genetic algorithms , 1995, IEA/AIE '95.

[57]  John Wilson,et al.  Hardware/software selected cycle solution , 1994, Third International Workshop on Hardware/Software Codesign.

[58]  Giovanni De Micheli,et al.  Hardware C - A Language for Hardware Design , 1988 .

[59]  Rolf Ernst,et al.  COSYMA: a software-oriented approach to hardware/software codesign , 1994 .

[60]  M. de Rijke,et al.  The Boyer-Moore theorem prover , 2000 .

[61]  Robin Milner,et al.  A Calculus of Communicating Systems , 1980, Lecture Notes in Computer Science.