Kyokko: a vendor-independent high-speed serial communication controller

With the advancement of HLS technology, FPGA is finally drawing attention as a power-efficient accelerator device. Unlike GPUs, the computation pipeline and FPGA-to-FPGA interconnection can be tightly coupled on FPGAs because they have high-speed serial transceivers on the device itself. The direct connection between computation and network encourages building FPGA clusters with direct high-speed serial links between FPGAs. For these links, commercial IP cores with their proprietary protocol are widely used. However, the commercial IP cores and protocols are not fully customizable. In this paper, an open high-speed serial link controller Kyokko is introduced. Kyokko is based on Xilinx Aurora 64B/66B protocol. It achieves 10+ Gbps of link rates with flow control and channel bonding support within a smaller resource requirement and communication latency than Xilinx's Aurora IP core. The transceiver interface of Kyokko is portable and interoperable between both Intel and Xilinx FPGAs. Also, users can extend the protocol to meet their demands because Kyokko is an open-source project.