Design and performance of a main memory hardware data compressor
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[1] Richard E. Kessler,et al. Generation and analysis of very long address traces , 1990, [1990] Proceedings. The 17th Annual International Symposium on Computer Architecture.
[2] Meng Chang Chen,et al. HiPEC: high performance external virtual memory caching , 1994, OSDI '94.
[3] Ian H. Witten,et al. Arithmetic coding for data compression , 1987, CACM.
[4] Ian H. Witten,et al. Text Compression , 1990, 125 Problems in Text Algorithms.
[5] Abraham Lempel,et al. A universal algorithm for sequential data compression , 1977, IEEE Trans. Inf. Theory.
[6] Terry A. Welch,et al. A Technique for High-Performance Data Compression , 1984, Computer.
[7] C.-Y. Lee,et al. High-throughput data compressor designs using content addressable memory , 1995 .
[8] Stephen Rago,et al. The Desktop File System , 1994, USENIX Summer.
[9] Michael J. Flynn,et al. TIME: Tools for Input/output and Memory Evaluation , 1992, Proceedings of the Twenty-Fifth Hawaii International Conference on System Sciences.
[10] Arvin Park,et al. Performance through memory , 1987, SIGMETRICS '87.
[11] David A. Patterson,et al. Computer Architecture: A Quantitative Approach , 1969 .
[12] Robert E. Tarjan,et al. A Locally Adaptive Data , 1986 .
[13] Fred Douglis,et al. The Compression Cache: Using On-line Compression to Extend Physical Memory , 1993, USENIX Winter.
[14] Butler W. Lampson,et al. On-line data compression in a log-structured file system , 1992, ASPLOS V.
[15] S. Jones,et al. 100 Mbit/s adaptive data compressor design using selectively shiftable content-addressable memory , 1992 .
[16] Thad Jennings. Estimating the Fault Rate Function , 1992, IBM Syst. J..