3D-DRAM Performance for Different OpenMP Scheduling Techniques in Multicore Systems

Advances in memory technologies including 3DDRAM memories (such as High Bandwidth Memory (HBM) and Hybrid Memory Cube (HMC) systems), wide I/O memory promise very large bandwidths at lower power consumption to address the needs of high-performance computing as well as emerging big data applications. However, in order to fully benefit from such bandwidths, it is necessary to understand how to optimally organize data across channels, ranks, banks or vaults of the memory structures, how to obtain large volumes of data with fewer accesses and how to schedule threads of multi threaded applications to benefit from these memory organizations. In this paper, we will examine different memory organizations that spread data across channels, ranks, and banks and identify application features that benefit from different organizations. Our study applies to generic DDR memory structures as well as 3DDRAMs. We will also evaluate scheduling of OpenMP threads (e.g., using static, dynamic and guided) but with emphasis on how different scheduling methods benefit from different memory organizations. Using the best scheduling for the application, proper memory organization, our experiments show, we can achieve up to 16 percent performance gains depending on workload.