ESD protection of the high voltage tolerant pins in low-voltage BiCMOS processes
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[1] J. Tihanyi,et al. A new generation of high voltage MOSFETs breaks the limit line of silicon , 1998, International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217).
[2] M. Stecher,et al. Wide range control of the sustaining voltage of ESD protection elements realized in a smart power technology , 1999, Electrical Overstress/Electrostatic Discharge Symposium Proceedings. 1999 (IEEE Cat. No.99TH8396).
[3] S. M. Sze,et al. Physics of semiconductor devices , 1969 .
[4] A. Concannon,et al. Multi-port ESD protection using bi-directional SCR structures , 2003, 2003 Proceedings of the Bipolar/BiCMOS Circuits and Technology Meeting (IEEE Cat. No.03CH37440).
[5] Albert Wang,et al. A compact square-cell ESD structure for BiCMOS IC , 1999, Proceedings of the 1999 Bipolar/BiCMOS Circuits and Technology Meeting (Cat. No.99CH37024).
[6] O.H. Schade,et al. Enhanced CMOS for analog-digital power IC applications , 1986, IEEE Transactions on Electron Devices.
[7] V.A. Vashchenko,et al. ESD protection of double-diffusion devices in submicron CMOS processes , 2004, Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat. No.04EX850).