A self-organizing neural net chip

A circuit has been designed and fabricated which implements a self-organizing algorithm proposed by T. Kohonen (1984). It uses a competitive learning process which modifies weights such that similar input feature vectors are clustered into distinct classes. This network learns without supervision. Matching is accomplished by computing the squared Euclidean distance at each node between the input and the current weight vector. Connections to each node are implemented with multiplying D/A converters. The weights are stored in dynamic RAM registers at each connection. The design minimizes circuit area by using unary encoding in the weight representation to permit the use of shift operations in the adaption process and by sharing the circuits used in weight adaptation and the activation computations.<<ETX>>