Correlation-Based Frequency-Response Mismatch Compensation of Quad-TIADC Using Real Samples

This brief proposes a new digital architecture to compensate for the frequency-response mismatch that is specific to four-channel time-interleaved analog-to-digital converters (quad-TIADCs) using a linear periodic time-varying correction and an adaptive feed-backward design. Estimation of the correction parameters is performed iteratively by solving two linear systems based on correlation values of the real signal from the TIADC output. Problem formulation is well detailed and hardware implementation results demonstrate the efficiency of our method.

[1]  Stephen H. Lewis,et al.  A Four-Channel Time-Interleaved ADC With Digital Calibration of Interchannel Timing and Memory Errors , 2010, IEEE Journal of Solid-State Circuits.

[2]  Stephen H. Lewis,et al.  Calibration of sample-time error in a two-channel time-interleaved analog-to-digital converter , 2004, IEEE Transactions on Circuits and Systems I: Regular Papers.

[3]  Gernot Kubin,et al.  Modeling, Identication, and Compensation of Channel Mismatch Errors in Time-Interleaved Analog-to-Digital Converters , 2005 .

[4]  Masanori Furuta,et al.  All-Digital Background Calibration Technique for Time-Interleaved ADC Using Pseudo Aliasing Signal , 2013, IEEE Transactions on Circuits and Systems I: Regular Papers.

[5]  Mikko Valkama,et al.  A blind frequency response mismatch correction algorithm for 4-channel Time-Interleaved ADC , 2014, 2014 IEEE International Symposium on Circuits and Systems (ISCAS).

[6]  Håkan Johansson,et al.  Time-interleaved analog-to-digital converters: status and future directions , 2006, 2006 IEEE International Symposium on Circuits and Systems.

[7]  Mikko Valkama,et al.  2-channel Time-Interleaved ADC frequency response mismatch correction using adaptive I/Q signal processing , 2013, 2013 IEEE 56th International Midwest Symposium on Circuits and Systems (MWSCAS).

[8]  Christian Vogel Modeling, Identification, and Compensation of Channel Mismatch Errors in Time-Interleaved Analog-to- , 2005 .

[9]  P.J. Hurst,et al.  A 10b 120MSample/s time-interleaved analog-to-digital converter with digital background calibration , 2002, 2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315).