A low power ROIC design for 1024×1024 IRFPA

A low power Read-Out Integrated Circuit (ROIC) for a short-wave Infra-Red Focal Plane Array (IRFPA) is designed as a prototype for 1024×1024 image system. Ripple integration and readout scheme as well as highly efficient power management is introduced to this design in order to decrease total power dissipation. To overcome the charge sharing problem caused by this low power readout scheme, novel low input capacitance column amplifier is proposed. The Data rate is about 10 M/s per channel, with a total power dissipation of 56 mW.

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