An analog circuit synthesis tool based on efficient and reliable yield estimation

Analog circuit design has become a very challenging and time consuming process for circuit designers due to increased non-idealities and worsening variability phenomena. In order to facilitate the design process, several analog circuit sizing tools have been proposed in the literature. These tools have then led to yield-aware ones, where a certain yield is targeted. However, the type of variability analysis to be employed is still a topic of discussion due to the challenging trade-off between accuracy and efficiency of the yield analysis. Quasi-Monte Carlo (QMC) approach is one of the efficient techniques that provides efficient variability analysis via deterministic, and more importantly homogeneous sampling. The major bottleneck of the conventional QMC is that there is no practical way to calculate the estimation error. Scrambled-QMC has been utilized to obtain the error bounds of the estimation, thanks to multiple runs of randomized sample sets. However, the requirement of multiple runs substantially increases the synthesis time. To overcome this problem, this paper proposes a novel yield-aware analog circuit sizing tool, where an adaptive sample sizing algorithm for scrambled-QMC is employed in the yield estimation part.

[1]  Xin Li,et al.  Robust Analog/RF Circuit Design With Projection-Based Performance Modeling , 2007, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[2]  Mohab Anis,et al.  Practical Monte-Carlo based timing yield estimation of digital circuits , 2010, 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010).

[3]  E Ackerman,et al.  Latin hypercube sampling and the sensitivity analysis of a Monte Carlo epidemic model. , 1988, International journal of bio-medical computing.

[4]  Rob A. Rutenbar,et al.  OASYS: a framework for analog circuit synthesis , 1989, Proceedings., Second Annual IEEE ASIC Seminar and Exhibit,.

[5]  Ulf Schlichtmann,et al.  The Sizing Rules Method for CMOS and Bipolar Analog Integrated Circuit Synthesis , 2008, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[6]  Sung-Mo Kang,et al.  Worst-case analysis and optimization of VLSI circuit performances , 1995, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[7]  Ali Emre Pusane,et al.  A hybrid Quasi Monte Carlo method for yield aware analog circuit sizing tool , 2015, 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE).

[8]  E. Hlawka.  Funktionen von beschränkter Variatiou in der Theorie der Gleichverteilung , 1961 .

[9]  Nuno Horta,et al.  Analog circuits optimization based on evolutionary computation techniques , 2010, Integr..

[10]  Günhan Dündar,et al.  A new approach to modeling statistical variations in MOS transistors , 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

[11]  Rob A. Rutenbar,et al.  Synthesis of high-performance analog circuits in ASTRX/OBLX , 1996, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[12]  Hongmei Chi,et al.  Scrambled quasirandom sequences and their applications , 2004 .

[13]  Jerome Spanier,et al.  Quasi-Random Methods for Estimating Integrals Using Relatively Small Samples , 1994, SIAM Rev..

[14]  A. Asenov,et al.  Intrinsic parameter fluctuations in decananometer MOSFETs introduced by gate line edge roughness , 2003 .

[15]  H. Chandler.  Practical , 1982, Digital Transformation of the Laboratory.

[16]  Francisco V. Fernández,et al.  Automated Design of Analog and High-frequency Circuits - A Computational Intelligence Approach , 2013, Studies in Computational Intelligence.

[17]  Paolo Crippa,et al.  Parametric yield formulation of MOS IC's affected by mismatch effect , 1999, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[18]  Rob A. Rutenbar,et al.  Anaconda: simulation-based synthesis of analog circuits viastochastic pattern search , 2000, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[19]  Qingfu Zhang,et al.  An Efficient Evolutionary Algorithm for Chance-Constrained Bi-Objective Stochastic Optimization , 2013, IEEE Transactions on Evolutionary Computation.

[20]  H. Faure.  Discrépance de suites associées à un système de numération (en dimension s) , 1982 .

[21]  A. Owen.  Randomly Permuted (t,m,s)-Nets and (t, s)-Sequences , 1995 .

[22]  Günhan Dündar,et al.  Simulation-based analog and RF circuit synthesis using a modified evolutionary strategies algorithm , 2011, Integr..

[23]  Helmut E. Graeb,et al.  Analog circuit sizing using adaptive worst-case parameter sets , 2002, Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition.

[24]  Ali Emre Pusane,et al.  Adaptive sized Quasi-Monte Carlo based yield aware analog circuit optimization tool , 2014, 2014 5th European Workshop on CMOS Variability (VARI).

[25]  Andrei Vladimirescu,et al.  Analog circuit synthesis using standard EDA tools , 2006, 2006 IEEE International Symposium on Circuits and Systems.

[26]  Francisco V. Fernández,et al.  Efficient and Accurate Statistical Analog Yield Optimization and Variation-Aware Circuit Sizing Based on Computational Intelligence Techniques , 2011, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[27]  Engin Afacan,et al.  Sensitivity based methodologies for process variation aware analog IC optimization , 2014, 2014 10th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME).

[28]  Pierre L'Ecuyer,et al.  Recent Advances in Randomized Quasi-Monte Carlo Methods , 2002 .

[29]  Amit Patra,et al.  An Evolutionary Algorithm-Based Approach to Automated Design of Analog and RF Circuits Using Adaptive Normalized Cost Functions , 2007, IEEE Transactions on Evolutionary Computation.

[30]  Rob A. Rutenbar,et al.  Practical, fast Monte Carlo statistical static timing analysis: why and how , 2008, ICCAD 2008.

[31]  Harald Niederreiter,et al.  Random number generation and Quasi-Monte Carlo methods , 1992, CBMS-NSF regional conference series in applied mathematics.

[32]  Francisco V. Fernández,et al.  Reuse-Based Methodologies and Tools in the Design of Analog and Mixed-Signal Integrated Circuits , 1992 .

[33]  Rob A. Rutenbar,et al.  Why Quasi-Monte Carlo is Better Than Monte Carlo or Latin Hypercube Sampling for Statistical Circuit Analysis , 2010, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[34]  P. Gruber,et al.  Funktionen von beschränkter Variation in der Theorie der Gleichverteilung , 1990 .

[35]  J. Halton.  On the efficiency of certain quasi-random sequences of points in evaluating multi-dimensional integrals , 1960 .

[36]  I. Sobol.  Uniformly distributed sequences with an additional uniform property , 1976 .

[37]  Rob A. Rutenbar,et al.  Novel Algorithms for Fast Statistical Analysis of Scaled Circuits , 2009, Lecture Notes in Electrical Engineering.

[38]  H. Niederreiter.  Low-discrepancy and low-dispersion sequences , 1988 .

[39]  Georges G. E. Gielen,et al.  AMGIE-A synthesis environment for CMOS analog integrated circuits , 2001, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[40]  Lawrence T. Pileggi,et al.  Quadratic Statistical $MAX$ Approximation for Parametric Yield Estimation of Analog/RF Integrated Circuits , 2008, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[41]  Saraju P. Mohanty,et al.  Ordinary Kriging metamodel-assisted Ant Colony algorithm for fast analog design optimization , 2012, Thirteenth International Symposium on Quality Electronic Design (ISQED).

[42]  Colas Schretter,et al.  Monte Carlo and Quasi-Monte Carlo Methods , 2016 .

[43]  Chaitali Chakrabarti,et al.  Random variability modeling and its impact on scaled CMOS circuits , 2010 .