A study on a BiCMOS 10‐bit video sample and hold IC

This paper discusses the sample-and-hold IC to be placed in front of the 10-bit serial-parallel analog/digital converter (ADC). The realization of an IC in operation with a +5-V single supply is discussed, considering the integration with ADC and the system-on-chip implementation in the future. The buffer circuit with a configuration based on NPN and PNP complementary elements is employed. The combination of PMOS and NPN elements is newly devised and applied, as a way to realize the high-speed PNP element. Applying 1.2-μm BiCMOS process to this circuit, IC is constructed and evaluated. As a result, the performances of maximum operating frequency 40 MHz, the signal-to-noise ratio of 63 dB for the 8-MHz full-scale signal input, the acquisition time of 20 ns for 1-V step input, D.G. of less than 1 percent and D.P. of less than 0.5° are obtained. Thus, the sample-and-hold IC with the single voltage supply and 10-bit accuracy is realized.