Retiming and clock skew for synchronous systems

Retiming and clock skew are both timing optimization methods for synchronous circuitry but are usually applied separately. We use the concept of scheduling to form a common background in the formulation of retiming and clock skew, and to study the interplay between, retiming and clock skew. A methodology to optimise synchronous circuitry with both retiming and clock skew is proposed.<<ETX>>