An FPGA run-time system for dynamical on-demand reconfiguration

Summary form only given. The handling of an increasing number of automotive comfort functionalities has become a significant problem for the most automobile manufacturers since communication, power consumption, available space and cost become important issues for a growing number of engine control units. Our contribution presents a first approach for a flexible versatile FPGA-based run-time system supporting a resource saving function multiplex.

[1]  David A. Kearney,et al.  The management of applications for reconfigurable computing using an operating system , 2002 .

[2]  Delon Levi,et al.  JBits: Java based interface for reconfigurable computing , 1999 .

[3]  Jürgen Teich,et al.  Real-Time Configuration Code Decompression for Dynamic FPGA Self-Reconfiguration , 2004, IEEE International Parallel and Distributed Processing Symposium.

[4]  David A. Kearney,et al.  Issues in Operating Systems for Reconfigurable Computing , 2002 .

[5]  David A. Kearney,et al.  The first real operating system for reconfigurable computers , 2001, Proceedings 6th Australasian Computer Systems Architecture Conference. ACSAC 2001.

[6]  Jürgen Becker,et al.  Real-Time Dynamically Run-Time Reconfiguration for Power-/Cost-optimized Virtex FPGA Realizations , 2003, VLSI-SOC.

[7]  Rudy Lauwereins,et al.  Enabling hardware-software multitasking on a reconfigurable computing platform for networked portable multimedia appliances , 2002 .

[8]  Rudy Lauwereins,et al.  Interconnection Networks Enable Fine-Grain Dynamic Multi-tasking on FPGAs , 2002, FPL.

[9]  Scott McMillan,et al.  A lightweight approach for embedded reconfiguration of FPGAs , 2003, 2003 Design, Automation and Test in Europe Conference and Exhibition.

[10]  Wolfgang Rosenstiel,et al.  Reconfigurable hardware as shared resource for parallel threads , 1998, Proceedings. IEEE Symposium on FPGAs for Custom Computing Machines (Cat. No.98TB100251).

[11]  David A. Kearney,et al.  Efficient Allocation of FPGA Area to Multiple Users in an Operating System for Reconfigurable Computing , 2002 .

[12]  Reinhard Männer,et al.  Multitasking on FPGA Coprocessors , 2000, FPL.

[13]  Amar Mukherjee,et al.  Efficient decoding of compressed data , 1995 .

[14]  Rudy Lauwereins,et al.  Hierarchical Run-Time Reconfiguration Managed by an Operating System for Reconfigurable Systems , 2003, Engineering of Reconfigurable Systems and Algorithms.

[15]  J. Becker,et al.  Real-time configuration code decompression for dynamic FPGA self-reconfiguration , 2004, 18th International Parallel and Distributed Processing Symposium, 2004. Proceedings..

[16]  John W. Lockwood,et al.  Dynamic hardware plugins in an FPGA with partial run-time reconfiguration , 2002, DAC '02.

[17]  Reinhard Männer,et al.  Preemptive multitasking on FPGAs , 2000, Proceedings 2000 IEEE Symposium on Field-Programmable Custom Computing Machines (Cat. No.PR00871).

[18]  P ? ? ? ? ? ? ? % ? ? ? ? , 1991 .

[19]  Rudy Lauwereins,et al.  Designing an operating system for a heterogeneous reconfigurable SoC , 2003, Proceedings International Parallel and Distributed Processing Symposium.

[20]  David A. Kearney,et al.  The Development of an Operating System for Reconfigurable Computing , 2001, The 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM'01).

[21]  Rudy Lauwereins,et al.  Networks on Chip as Hardware Components of an OS for Reconfigurable Systems , 2003, FPL.

[22]  Philip James-Roxby,et al.  A Self-reconfiguring Platform , 2003, FPL.

[23]  Abraham Lempel,et al.  A universal algorithm for sequential data compression , 1977, IEEE Trans. Inf. Theory.

[24]  Mostafa A. Bassiouni,et al.  Efficient Decoding of Compressed Data , 1995, J. Am. Soc. Inf. Sci..

[25]  Rudy Lauwereins,et al.  Infrastructure for design and management of relocatable tasks in a heterogeneous reconfigurable system-on-chip , 2003, 2003 Design, Automation and Test in Europe Conference and Exhibition.