A communication network for a tree-structured assembly (X-TREE) of single-chip processors is described, and considerations for selecting this particular approach are discussed. The communication links between the processors are high-speed, byte-parallel connections with an asynchronous handshaking protocol. Each node of X-TREE consists of a powerful processor, a switching network and a dedicated communications controller. The latter checks the availability of the links terminating in this node, supervises the creation and elimination of message channels and controls the routing and time multiplexing of concurrent messages over the same link. The switching network inside each X-NODE connects the external links with the internal processor via a fast multiplexed bus which is interfaced to each input/output port through fifo message buffers. Network topology, routing algorithm, addressing scheme, message format and communication hardware are discussed.
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