Exploiting GPU with 3D Stacked Memory to Boost Performance for Data-Intensive Applications

An increasing number of applications are using GPUs for acceleration. Due to the massive number of memory accesses, the traditional DRAM becomes a bandwidth bottleneck. The 3D stacked memory gives the potential to alleviate the bandwidth bottleneck by using through silicon vias (TSVs) to deliver much higher on-chip bus width than the traditional off-chip interface. In this paper, we evaluate the latency and bandwidth benefits of 3D stacked memory on GPUs. In addition, we take advantage of the DRAM row buffer locality to merge memory requests to further improve the performance.