3 GHz CMOS Doherty power amplifier for high efficiency

This paper presents a design of 3 GHz CMOS fully integrated Doherty power amplifier (DPA). The proposed DPA design is composed of two parallel amplifier stages, the principal in class AB and the auxiliary in class B. Both DPA stages use a cascode topology for its high output-input isolation, and high supply voltage possibility. Based on 0.13-µm CMOS process and supplied by 2.6 V of supply voltage, the simulation results of the proposed DPA shows 17 dB of power gain and a maximal output power of 26 dBm, and 37% of power added efficiency for the 6 dB back-off point and 48 % for the maximal output power.

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