An improved fractional divider for fractional-N frequency synthesizers

This paper presents an improved fractional divider used in 1.8~2GHz fractional-N frequency synthesizers. A new clock setting for delta-sigma modulator (DSM) is proposed to prevent the potential problems of traditional fractional dividers: the DSM output would be wrongly loaded and the action of DSM circuit may affect the phase-detection of phase-frequency-detector (PFD). Simulation result shows the effectiveness of this improvement.

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