Truly Modular Burst-Mode CDR With Instantaneous Phase Acquisition for Multiaccess Networks

We demonstrate a novel 10-Gb/s burst-mode clock and data recovery circuit (BM-CDR) for multiaccess networks. Our design is based on a hybrid topology of a feedback CDR and a feed-forward clock phase aligner utilizing space-sampled clocks. The BM-CDR achieves a bit error rate (BER) while featuring instantaneous (0-bit) phase acquisition for any phase step between successive bursts. We also develop a probabilistic theoretical model for space-sampled BM-CDRs to quantify the BER performance. The theoretical model accounts for the phase step between consecutive packets, packet preamble length, and jitter on the sampling clock.

[1]  D V Plant,et al.  5/10-Gb/s Burst-Mode Clock and Data Recovery Based on Semiblind Oversampling for PONs: Theoretical and Experimental , 2010, IEEE Journal of Selected Topics in Quantum Electronics.

[2]  J.D.H. Alexander Clock recovery from random binary signals , 1975 .

[3]  N. Yoshimoto,et al.  A 10.3 Gb/s Burst-Mode CDR Using a ΔΣ DAC , 2008, IEEE Journal of Solid-State Circuits.

[4]  D. Plant,et al.  Burst-mode clock and data recovery in optical multiaccess networks using broad-band PLLs , 2006, IEEE Photonics Technology Letters.

[5]  Sophie LaRochelle,et al.  Experimental Study of Burst-Mode Reception in a 1300 km Deployed Fiber Link , 2010, IEEE/OSA Journal of Optical Communications and Networking.