Design and Control of a Three-Stage Switch Matrix in the Presence of Fan-Out

Recent advancements in high-speed sold-state switching technology have created considerable interest in automatic switching of computation modules within analog computers under the control of digital computers. In this description of work done in "autopatching" of analog computers, relationships are derived among the parameters of a 3-stage asymmetrical connection network which will minimize the number of switches required and yet leave the network rearrangeable or effectively nonblocking. The problem of routing connections through a 3-stage network in presence of fan-out is also considered. The assignment problem is viewed as a mapping of the input terminal set onto the output terminal set. An algorithm is presented which employs mapping operations to resolve blocking conflicts systematically as they are encountered.