Faster computation on directed networks of automata

1 Introduction We show how an arbitrary strongly-connected In this paper we consider directed strongly-directed network of synchronous finite-state au-connected networks of synchronous finite-state tomata (with bounded in-and out-degree) can automata with bounded in-and out-degree. In accomplish a number of basic distributed network this setting we focus on the efficiency of basic tasks in O(lVD) time (where D is the diameter of network tasks such as the " Firing Synchroniza-the network and N is the number of processors). tion Problem " ; the " Network Search and Traver-These tasks include (among others) the Firing sal Problem " and several others (i.e. DFS, BFS, Synchronization Problem; Network Search and simulating a step of an undirected graph protocol, Tkaversal; building outgoing and incoming Span-etc.). We give O(lVll) time solutions to all these ning Trees; Wake-up and Report When Done; problems. Our approach builds upon the best and simulating a step of an undirected network previously known 0(IV2) algorithms of Even, Lit-prcstocol on the underlying graph of the directed man and Winkler [ELW-90] for these problems. network. Permission to make digital/hind copies of all or part of this material for personal or classroom use is granted without fee provided that the copies are not made or distributed for profit or commercial advantage, the copyright notice, the title of the publication and its date appear, and notice is In this paper, we consider directed strongly-connected networks. That is, there may exist a one-way communication link between two processors without a link in the opposite direction. In addition to its theoretical interest, uni-directional communication actually occurs in radio networks (due to different transmission strengths) and in VLSI circuits and also arises in hi-directional networks where one direction of a hi-directional link has failed. In this paper we are also concerned with reducing the amount of memory required per processor. The current technological trend is to implement network protocols in hardware and to minimize the amount of memory required (for further discussion, see [MOOY-92, AO-94]). We model processors as identical deterministic finite-state machines (i.e. chips) of a constant size (that is, 38 independent of the size of the network) with a constant number of input and output ports. A finite alphabet of signals is used. The network is constructed by connecting the output ports of automata to the input ports of other automata Not all input/output ports need to be connected. Thus, each automaton has some …