Modeling of 10-nm-scale ballistic MOSFET's

We have performed numerical modeling of nanoscale dual-gate ballistic n-MOSFET's with ultrathin undoped channel, taking into account the effects of quantum tunneling along the channel and through the gate oxide. The results show that transistors with channel length as small as 8 nm can exhibit either a transconductance up to 4000 mS/mm or gate modulation of current by more than 8 orders of magnitude, depending on the gate oxide thickness. These characteristics make the sub-10-nm devices potentially suitable for logic and memory applications, though their parameters are rather sensitive to size variations.

[1]  M. V. Fischetti,et al.  Monte Carlo simulation of a 30 nm dual-gate MOSFET: how short can Si go? , 1992, 1992 International Technical Digest on Electron Devices Meeting.

[2]  K. Natori.  Ballistic metal-oxide-semiconductor field effect transistor , 1994 .

[3]  Mark S. Lundstrom.  Elementary scattering theory of the Si MOSFET , 1997, IEEE Electron Device Letters.

[4]  K. Likharev,et al.  Nanoscale field-effect transistors: An ultimate size analysis , 1997, cond-mat/9706026.

[5]  D. Frank,et al.  Device design considerations for double-gate, ground-plane, and single-gated ultra-thin SOI MOSFET's at the 25 nm channel length generation , 1998, International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217).

[6]  J. A. López-Villanueva,et al.  Monte Carlo simulation of electron transport properties in extremely thin SOI MOSFET's , 1998 .

[7]  D. Frank,et al.  25 nm CMOS design considerations , 1998, International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217).

[8]  Straddle gate transistors: high I/sub on//I/sub off/ transistors at short gate lengths , 1999, 1999 57th Annual Device Research Conference Digest (Cat. No.99TH8393).

[9]  Konstantin K. Likharev,et al.  Single-electron devices and their applications , 1999, Proc. IEEE.

[10]  Hideki Matsumura,et al.  A metal/insulator tunnel transistor with 16 nm channel length , 1999 .

[12]  David J. Frank,et al.  Nanoscale CMOS , 1999, Proc. IEEE.

[13]  Mark S. Lundstrom,et al.  On the performance limits for Si MOSFETs: a theoretical study , 2000 .