A Low-Energy Memory Design Technique Based on Variable Analysis for Application-Specific Systems

This paper presents a novel low-energy memory design technique based on variable analysis for on-chip data memory (RAM) in application-specific systems, which called VAbM technique. It targets the exploitation of both data locality and effective data width of variables to reduce energy consumed by data transfer and storage. Under constraints of the number of memory banks, VAbM technique use variable analysis results to perform allocating and assigning on-chip RAM into multiple banks, which have different size with different number of word lines and different number of bit lines tailored to each application requirements. Experimental results with several real embedded applications demonstrate significant energy reduction up to 80.6% over monolithic memory, and 34.1% compared to memory designed by

[1]  Hiroyuki Tomiyama,et al.  Language and compiler for optimizing datapath widths of embedded systems , 1998 .

[2]  Luca Benini,et al.  A recursive algorithm for low-power memory partitioning , 2000, ISLPED'00: Proceedings of the 2000 International Symposium on Low Power Electronics and Design (Cat. No.00TH8514).

[3]  Yun Cao,et al.  Variable size analysis and validation of computation quality , 2000, Proceedings IEEE International High-Level Design Validation and Test Workshop (Cat. No.PR00786).

[4]  Chaitali Chakrabarti,et al.  Memory exploration for low power, embedded systems , 1999, DAC '99.

[5]  Y. Cao.  A System-level Energy Minimization Using Datapath Optimization , 2001 .

[6]  Erik Brockmeyer,et al.  Data and memory optimization techniques for embedded systems , 2001, TODE.

[7]  Donald E. Thomas,et al.  Memory modeling for system synthesis , 2000, IEEE Trans. Very Large Scale Integr. Syst..

[8]  Catherine H. Gebotys.  Low energy memory and register allocation using network flow , 1997, DAC.