The MLCA: A Solution Paradigm for Parallel Programmable SoCs

Parallel programmable systems-on-a-chip (PP-SoC) are quickly becoming the de facto architecture for high-performance embedded systems. The programming of these systems is a challenge that often increases the cost of system development. The multi-level computing architecture (MLCA) promises to address this programmability challenge by supporting a superscalar coarse-grain parallel programming model. In this paper, we describe the MLCA and its programming model. We provide an overview of the compilation environment we are developing for this architecture. We present an evaluation of the MLCA and its compiler support using realistic multimedia applications on a simulator and on an FPGA prototype of the MLCA. The results indicate the viability of this architecture for multimedia applications