Geometry Scaling of the Substrate Loss of RF MOSFETs

Small-signal S-parameters measured on wafer for conventional NMOS devices with gate lengths ranging from 10 J.Lm down to 0.35 J.Lm have been -used to clarify and model the geometry scaling of the substrate loss resistance for the first time. This fa­ cilitates accurate simulation of the RF be­ haviour in all regions of operation.

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