Automated systolic array architecture synthesis for high throughput CNN inference on FPGAs
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Peng Zhang | Jason Cong | Cody Hao Yu | Yun Liang | Yuxin Wang | Han Hu | Xuechao Wei | Youxiang Chen | J. Cong | P. Zhang | Yun Liang | Xuechao Wei | Youxiang Chen | Yuxin Wang | Hangtao Hu
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