A data recomputation approach for reliability improvement of scratchpad memory in embedded systems

Scratchpad memory (SPM) is extensively used as the on-chip memory in modern embedded processors alongside of the cache memory or as its alternative. Soft errors in SPM are one of the major contributors to system failures, due to ever-increasing susceptibility of SPM cells to energetic particle strikes. Since a large fraction of soft errors occurs in the shape of Multiple-Bit Upsets (MBUs), traditional memory protection techniques, i.e., Error Correcting Code (ECCs), are not affordable for SPM protection; mainly because of their limited error coverage and/or their high overheads. This paper proposes a novel algorithm that efficiently protects SPM with high error correction capability and minimum overheads. This proposed data recomputation algorithm recomputes the correct value whenever an error is detected in the SPM. The simulation results show that the proposed algorithm significantly reduces the vulnerability of SPM from 91.7% to 8.4%. Moreover, the proposed algorithm imposes no area overhead and no hardware modification, meanwhile its performance overhead is less than 1%.

[1]  José Luís Almada Güntzel,et al.  A Post-compiling Approach that Exploits Code Granularity in Scratchpads to Improve Energy Efficiency , 2010, 2010 IEEE Computer Society Annual Symposium on VLSI.

[2]  Wei-Che Tseng,et al.  Write Activity Minimization for Nonvolatile Main Memory Via Scheduling and Recomputation , 2011, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[3]  Joel Emer,et al.  A systematic methodology to compute the architectural vulnerability factors for a high-performance microprocessor , 2003, Proceedings. 36th Annual IEEE/ACM International Symposium on Microarchitecture, 2003. MICRO-36..

[4]  Mahmut T. Kandemir,et al.  Minimizing Energy Consumption of Banked Memories Using Data Recomputation , 2006, ISLPED'06 Proceedings of the 2006 International Symposium on Low Power Electronics and Design.

[5]  Mahdi Fazeli,et al.  FTSPM: A Fault-Tolerant ScratchPad Memory , 2013, 2013 43rd Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN).

[6]  Peter Marwedel,et al.  Embedded system design , 2010, Embedded Systems.

[7]  Mahdi Fazeli,et al.  Memory Mapped SPM: Protecting Instruction Scratchpad Memory in Embedded Systems against Soft Errors , 2012, 2012 Ninth European Dependable Computing Conference.

[8]  Aviral Shrivastava,et al.  Smart cache cleaning: Energy efficient vulnerability reduction in embedded processors , 2011, 2011 Proceedings of the 14th International Conference on Compilers, Architectures and Synthesis for Embedded Systems (CASES).

[9]  Peter Marwedel,et al.  Reducing energy consumption by dynamic copying of instructions onto onchip memory , 2002, 15th International Symposium on System Synthesis, 2002..

[10]  Nikil D. Dutt,et al.  E-RoC: Embedded RAIDs-on-Chip for low power distributed dynamically managed reliable memories , 2011, 2011 Design, Automation & Test in Europe.

[11]  Trevor Mudge,et al.  MiBench: A free, commercially representative embedded benchmark suite , 2001 .

[12]  Sri Parameswaran,et al.  Hardware/software managed scratchpad memory for embedded system , 2004, IEEE/ACM International Conference on Computer Aided Design, 2004. ICCAD-2004..

[13]  Alan Wood,et al.  The impact of new technology on soft error rates , 2011, 2011 International Reliability Physics Symposium.

[14]  Mahmut T. Kandemir,et al.  Exploiting large on-chip memory space through data recomputation , 2010, 23rd IEEE International SOC Conference.

[15]  R.C. Baumann,et al.  Radiation-induced soft errors in advanced semiconductor technologies , 2005, IEEE Transactions on Device and Materials Reliability.

[16]  Mahmut T. Kandemir,et al.  Improving scratch-pad memory reliability through compiler-guided data block duplication , 2005, ICCAD-2005. IEEE/ACM International Conference on Computer-Aided Design, 2005..

[17]  Jaejin Lee,et al.  FaCSim: a fast and cycle-accurate architecture simulator for embedded systems , 2008, LCTES '08.