Identifying irreducible loops in the Instrumentation Point Graph

The Instrumentation Point Graph (IPG) is a program model whose primary usage is within hybrid measurement-based frameworks that compute Worst-Case Execution Time (WCET) estimates. The IPG represents the transitions between instrumentation points (Ipoints) that are inserted into the program to collect measurements at run time. However, uncontrolled Ipoint placement often causes the resultant IPG to contain unstructured (i.e. irreducible) loops, potentially compromising the safety of WCET estimates unless the hierarchical containment among IPG loops can be correctly identified. The contributions of this paper are fourfold: (1) we show that the IPG is more susceptible to irreducibility even when the program itself is well structured; (2) we demonstrate that state-of-the-art loop detection algorithms, designed specifically to handle irreducible loops, generally fail to construct the correct hierarchical relationship between IPG loops; (3) we present an algorithm that identifies arbitrary irreducible loops in the IPG during its construction from another graph-based model, an extended type of Control Flow Graph (CFG) called the CFG^*; (4) we show how the structural relation between the IPG and the CFG^* allows loop bounds obtained through static analysis to be transferred onto the IPG.

[1]  Jeffrey D. Ullman,et al.  Global Data Flow Analysis and Iterative Algorithms , 1976, J. ACM.

[2]  Raimund Kirner,et al.  Automatic timing model generation by CFG partitioning and model checking , 2005, Design, Automation and Test in Europe.

[3]  Alan Burns,et al.  Probabilistic timing analysis: An approach using copulas , 2005, J. Embed. Comput..

[4]  Stefan M. Petters,et al.  Making worst case execution time analysis for hard real-time tasks on state of the art processors feasible , 1999, Proceedings Sixth International Conference on Real-Time Computing Systems and Applications. RTCSA'99 (Cat. No.PR00306).

[5]  Peter P. Puschner,et al.  Calculating the maximum execution time of real-time programs , 1989, Real-Time Systems.

[6]  Manfred Schlett.  Trends in Embedded-Microprocessor Design , 1998, Computer.

[7]  Stefan M. Petters,et al.  Experimental evaluation of code properties for WCET analysis , 2003, RTSS 2003. 24th IEEE Real-Time Systems Symposium, 2003.

[8]  Robert E. Tarjan,et al.  Testing flow graph reducibility , 1973, J. Comput. Syst. Sci..

[9]  Steven S. Muchnick,et al.  Advanced Compiler Design and Implementation , 1997 .

[10]  G. Ramalingam,et al.  On loops, dominators, and dominance frontiers , 2002, TOPL.

[11]  Jakob Engblom,et al.  Efficient longest executable path search for programs with complex flows and pipeline effects , 2001, CASES '01.

[12]  Per Stenström,et al.  Timing anomalies in dynamically scheduled microprocessors , 1999, Proceedings 20th IEEE Real-Time Systems Symposium (Cat. No.99CB37054).

[13]  Joachim Wegener,et al.  A Comparison of Static Analysis and Evolutionary Testing for the Verification of Timing Constraints , 2004, Real-Time Systems.

[14]  James R. Larus,et al.  Efficient program tracing , 1993, Computer.

[15]  James R. Larus,et al.  Optimally profiling and tracing programs , 1992, POPL '92.

[16]  Todd M. Austin,et al.  SimpleScalar: An Infrastructure for Computer System Modeling , 2002, Computer.

[17]  Hiralal Agrawal,et al.  Dominators, super blocks, and program coverage , 1994, POPL '94.

[18]  Paul Havlak,et al.  Nesting of reducible and irreducible loops , 1997, TOPL.

[19]  Guillem Bernat,et al.  Tree-based WCET analysis on instrumentation point graphs , 2006, Ninth IEEE International Symposium on Object and Component-Oriented Real-Time Distributed Computing (ISORC'06).

[20]  Jeffrey K. Hollingsworth,et al.  Efficient instrumentation for code coverage testing , 2002, ISSTA '02.

[21]  Matthias Grochtmann,et al.  Verifying Timing Constraints of Real-Time Systems by Means of Evolutionary Testing , 1998, Real-Time Systems.

[22]  Guillem Bernat,et al.  Predicated Worst-Case Execution-Time Analysis , 2009, Ada-Europe.

[23]  Stefan M. Petters.  Bounding the execution time of real-time tasks on modern processors , 2000, Proceedings Seventh International Conference on Real-Time Computing Systems and Applications.

[24]  Jakob Engblom,et al.  Processor Pipelines and Static Worst-Case Execution Time Analysis , 2002 .

[25]  David B. Whalley,et al.  Supporting Timing Analysis by Automatic Bounding of Loop Iterations , 2000, Real-Time Systems.

[26]  Guillem Bernat,et al.  WCET analysis of probabilistic hard real-time systems , 2002, 23rd IEEE Real-Time Systems Symposium, 2002. RTSS 2002..

[27]  Clifford Stein,et al.  Introduction to Algorithms, 2nd edition. , 2001 .

[28]  Gene Frantz,et al.  ADVANCEMENTS IN DIGITAL SIGNAL PROCESSING TECHNOLOGY ARE ENABLING ITS USE FOR INCREASINGLY WIDESPREAD APPLICATIONS . DEVELOPERS WILL BE CHALLENGED TO USE THIS PROCESSING POWER TO ITS UTMOST , WHILE CREATING NEW APPLICATIONS AND IMPROVING EXISTING ONES , 2022 .

[29]  Gary A. Kildall,et al.  A unified approach to global program optimization , 1973, POPL.

[30]  Vugranam C. Sreedhar,et al.  Efficient program analysis using DJ graphs , 1996 .

[31]  Peter P. Puschner,et al.  Computing Maximum Task Execution Times — A Graph-Based Approach , 1997, Real-Time Systems.

[32]  Iain Bate,et al.  WCET Analysis of Modern Processors Using Multi-Criteria Optimisation , 2009, SSBSE 2009.

[33]  G. Ramalingam,et al.  Identifying loops in almost linear time , 1999, TOPL.

[34]  Robert E. Tarjan,et al.  A fast algorithm for finding dominators in a flowgraph , 1979, TOPL.

[35]  Jan Gustafsson,et al.  Automatic Derivation of Loop Bounds and Infeasible Paths for WCET Analysis Using Abstract Execution , 2006, 2006 27th IEEE International Real-Time Systems Symposium (RTSS'06).

[36]  Jakob Engblom,et al.  Clustered calculation of worst-case execution times , 2003, CASES '03.

[37]  Ronald L. Rivest,et al.  Introduction to Algorithms , 1990 .

[38]  Guillem Bernat,et al.  Scope-tree: a program representation for symbolic worst-case execution time analysis , 2002, Proceedings 14th Euromicro Conference on Real-Time Systems. Euromicro RTS 2002.