Functional cache chip for improved system performance

[1]  Peter W. Cook,et al.  A 15-ns CMOS 64K RAM , 1986 .

[2]  D. Fier,et al.  A 36/72b CMOS micro-mainframe chip set , 1986, 1986 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

[3]  Richard E. Matick,et al.  Architecture Implications in the Design of Microprocessors , 1984, IBM Syst. J..

[4]  Richard E. Matick.  Computer storage systems and technology , 1977 .

[5]  D. C. Bossen,et al.  Orthogonal latin square codes , 1970 .

[6]  Irving L. Traiger,et al.  Evaluation Techniques for Storage Hierarchies , 1970, IBM Syst. J..