The Image chip for high performance 3D rendering
暂无分享,去创建一个
Martin White | Paul F. Lister | Richard L. Grimsdale | R. L. Grimsdale | Graham J. Dunnett | F. Gelmot | M. White | P. Lister | F. Gelmot
[1] Jack Bresenham,et al. Ambiguities in Incremental Line Rastering , 1987, IEEE Computer Graphics and Applications.
[2] Neil Hunt,et al. The triangle processor and normal vector shader: a VLSI system for high performance graphics , 1988, SIGGRAPH.
[3] Andreas Schilling,et al. A new simple and efficient antialiasing with subpixel masks , 1991, SIGGRAPH.
[4] Henry Fuchs,et al. Pixel-planes 5: a heterogeneous multiprocessor graphics system using processor-enhanced memories , 1989, SIGGRAPH.
[5] David Kirk,et al. The rendering architecture of the DN10000VS , 1990, SIGGRAPH.
[6] Juan Pineda,et al. A parallel algorithm for polygon rasterization , 1988, SIGGRAPH.
[7] Martin White,et al. Testing Geometric Primitive Shaders , 1991, Advances in Computer Graphics Hardware.
[8] Loren C. Carpenter,et al. The A -buffer, an antialiased hidden surface method , 1984, SIGGRAPH.
[9] Martin White,et al. Workstation graphics-rendering hardware , 1992 .