Analysis of flip-chip packaging challenges on copper/low-k interconnects

An interfacial-fracture-mechanics-based simulation methodology has been developed to study the flip-chip packaging effect on the copper/low-k structures. Multilevel submodeling techniques have been used to bridge the scale difference between the flip-chip packages and the metal/dielectric stacks. To achieve a smaller feature size and higher speed in future chips, SiO/sub 2/ can be replaced with low-k dielectric material in all via and trench layers or the number of metal layers can be increased. The effect of both packaging options has been evaluated. With either option, the future flip-chip copper/low-k packages are facing higher possibilities of adhesive or cohesive failure near the low-k interface. This paper provides a quantitative evaluation of the increased risk, thus providing guidelines to the next level of low-k flip-chip packages.

[1]  L. L. Mercado,et al.  Impact of flip-chip packaging on copper/low-k structures , 2003 .

[2]  Paul S. Ho,et al.  Effect of packaging on interfacial cracking in Cu/ low k Damascene structures , 2003, 53rd Electronic Components and Technology Conference, 2003. Proceedings..

[3]  N. Aoi,et al.  Evaluation and analysis for mechanical strengths of low k dielectrics by a finite element method , 2002, Proceedings of the IEEE 2002 International Interconnect Technology Conference (Cat. No.02EX519).

[4]  R. Augur,et al.  Packaging assessment of porous ultra low-k materials , 2002, Proceedings of the IEEE 2002 International Interconnect Technology Conference (Cat. No.02EX519).

[5]  Guanghai Xu,et al.  Cohesive strength characterization of brittle low-k films , 2002, Proceedings of the IEEE 2002 International Interconnect Technology Conference (Cat. No.02EX519).

[6]  Grant M. Kloster,et al.  Porosity effects on low-k dielectric film strength and interfacial adhesion , 2002, Proceedings of the IEEE 2002 International Interconnect Technology Conference (Cat. No.02EX519).

[7]  C. Goldberg,et al.  A simulation method for predicting packaging mechanical reliability with low /spl kappa/ dielectrics , 2002, Proceedings of the IEEE 2002 International Interconnect Technology Conference (Cat. No.02EX519).

[8]  J. Vella,et al.  MICROSTRUCTURE AND MECHANICAL PROPERTIES OF ELECTROPLATED Cu THIN FILMS , 2000 .

[9]  Charles A. Martin,et al.  Elimination of bond-pad damage through structural reinforcement of intermetal dielectrics , 1998, 1998 IEEE International Reliability Physics Symposium Proceedings. 36th Annual (Cat. No.98CH36173).