Schedulability-driven frame packing for multicluster distributed embedded systems

We present an approach to frame packing for multicluster distributed embedded systems consisting of time-triggered and event-triggered clusters, interconnected via gateways. In our approach, the application messages are packed into frames such that the application is schedulable, thus the end-to-end message communication constraints are satisfied. We have proposed a schedulability analysis for applications consisting of mixed event-triggered and time-triggered processes and messages, and a worst-case queuing delay analysis for the gateways, responsible for routing inter-cluster traffic. Optimization heuristics for frame packing aiming at producing a schedulable system have been proposed. Extensive experiments and a real-life example show the efficiency of our frame-packing approach.

[1]  Alan Burns,et al.  Fixed priority pre-emptive scheduling: An historical perspective , 1995, Real-Time Systems.

[2]  Petru Eles,et al.  Scheduling with optimized communication for time-triggered embedded systems , 1999, Proceedings of the Seventh International Workshop on Hardware/Software Codesign (CODES'99) (IEEE Cat. No.99TH8450).

[3]  Luciano Lavagno,et al.  Scheduling for Embedded Real-Time Systems , 1998, IEEE Des. Test Comput..

[4]  Henrik Lönn,et al.  A comparison of fixed-priority and static cyclic scheduling for distributed automotive control applications , 1999, Proceedings of 11th Euromicro Conference on Real-Time Systems. Euromicro RTS'99.

[5]  David Lorge Parnas,et al.  Priority Scheduling Versus Pre-Run-Time Scheduling , 1998 .

[6]  Chung Laung Liu,et al.  Scheduling Algorithms for Multiprogramming in a Hard-Real-Time Environment , 1989, JACM.

[7]  Petru Eles,et al.  Bus access optimization for distributed embedded systems based on schedulability analysis , 2000, DATE '00.

[8]  Edward A. Lee,et al.  Dataflow process networks , 2001 .

[9]  Hermann Kopetz,et al.  Real-time systems , 2018, CSC '73.

[10]  Niraj K. Jha,et al.  COHRA: hardware-software cosynthesis of hierarchical heterogeneous distributed embedded systems , 1998, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[11]  Ken Tindell,et al.  ADDING TIME-OFFSETS TO SCHEDULABILITY ANALYSIS , 1994 .

[12]  D. Parnas,et al.  On satisfying timing constraints in hard-real-time systems , 1991, SIGSOFT '91.

[13]  Wayne H. Wolf A Decade of Hardware/Software Codesign , 2003, Computer.

[14]  Miodrag Potkonjak,et al.  Synthesis of Hard Real-Time Application Specific Systems , 1999, Des. Autom. Embed. Syst..

[15]  Alan Burns,et al.  The End Of The Line For Static Cyclic Scheduling? , 1993, Fifth Euromicro Workshop on Real-Time Systems.

[16]  Krithi Ramamritham,et al.  Advances in Real-Time Systems , 1993 .

[17]  Michael González Harbour,et al.  Schedulability analysis for tasks with static and dynamic offsets , 1998, Proceedings 19th IEEE Real-Time Systems Symposium (Cat. No.98CB36279).

[18]  Christer Norström,et al.  Frame packing in real-time communication , 2000, Proceedings Seventh International Conference on Real-Time Computing Systems and Applications.

[19]  David Lorge Parnas,et al.  On Satisfying Timing Constraints in Hard-Real-Time Systems , 1993, IEEE Trans. Software Eng..

[20]  John A. Clark,et al.  Holistic schedulability analysis for distributed hard real-time systems , 1994, Microprocess. Microprogramming.

[21]  James W. Layland,et al.  Scheduling Algorithms for Multiprogramming in a Hard-Real-Time Environment , 1989, JACM.

[22]  Krithi Ramamritham,et al.  Hard Real-Time Systems , 1988 .

[23]  C. Reeves Modern heuristic techniques for combinatorial problems , 1993 .

[24]  Thomas Nolte,et al.  Using bit-stuffing distributions in CAN analysis , 2001 .

[25]  Niraj K. Jha,et al.  COSYN: Hardware-software co-synthesis of heterogeneous distributed embedded systems , 1999, IEEE Trans. Very Large Scale Integr. Syst..

[26]  Petru Eles,et al.  Design optimization of multi-cluster embedded systems for real-time applications , 2004, Proceedings Design, Automation and Test in Europe Conference and Exhibition.

[27]  Alan Burns,et al.  Guest Editorial: A Review of Worst-Case Execution-Time Analysis , 2000, Real-Time Systems.

[28]  J. Javier Gutiérrez,et al.  Optimized priority assignment for tasks and messages in distributed hard real-time systems , 1995, Proceedings of Third Workshop on Parallel and Distributed Real-Time Systems.

[29]  Luciano Lavagno,et al.  Models of computation for embedded system design , 1999 .

[30]  Rolf Ernst,et al.  Codesign of Embedded Systems: Status and Trends , 1998, IEEE Des. Test Comput..

[31]  Hermann Kopetz,et al.  The cluster compiler—a tool for the design of time-triggered real-time systems , 1995 .

[32]  Paul Pop,et al.  Analysis and Synthesis of Communication-Intensive Heterogeneous Real-Time Systems , 2003 .

[33]  Petru Eles,et al.  Schedulability analysis and optimization for the synthesis of multi-cluster distributed embedded systems , 2003, 2003 Design, Automation and Test in Europe Conference and Exhibition.

[34]  Petru Eles,et al.  Holistic scheduling and analysis of mixed time/event-triggered distributed embedded systems , 2002, Proceedings of the Tenth International Symposium on Hardware/Software Codesign. CODES 2002 (IEEE Cat. No.02TH8627).

[35]  Petru Eles,et al.  Schedulability-Driven Communication Synthesis for Time Triggered Embedded Systems , 1999, Proceedings Sixth International Conference on Real-Time Computing Systems and Applications. RTCSA'99 (Cat. No.PR00306).

[36]  Michael González Harbour,et al.  Exploiting precedence relations in the schedulability analysis of distributed real-time systems , 1999, Proceedings 20th IEEE Real-Time Systems Symposium (Cat. No.99CB37054).

[37]  Wayne Wolf,et al.  Hardware-Software Co-Synthesis of Distributed Embedded Systems , 1996 .

[38]  Donal Heffernan,et al.  Expanding Automotive Electronic Systems , 2002, Computer.

[39]  Stephen A. Edwards,et al.  Languages for Digital Embedded Systems , 2000 .

[40]  Petru Eles,et al.  Scheduling with bus access optimization for distributed embedded systems , 2000, IEEE Trans. Very Large Scale Integr. Syst..