论文信息 - 40 Gbit/s 1:4 demultiplexer IC using InP-based heterojunction bipolar transistors

40 Gbit/s 1:4 demultiplexer IC using InP-based heterojunction bipolar transistors

A 40 Gbit/s 1:4 demultiplexer IC with a power dissipation of 2.97 W has been successfully fabricated using reliable, non-selfaligned, InP-based heterojunction bipolar transistors (HBTs) with a carbon-doped base and InGaAs/InP composite-collector. This is the first demonstration of all bipolar transistor 1:4 demultiplexers operating at such a high bit rate.

Shoji Yamahata | E. Sano | Y. Ishii | N. Watanabe | H. Nakajima

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